Contract analysis

I. INTRODUCTION AND IDENTIFICATION OF DECLARANT

1. My name is Dr. Caroline Ashford. I am a Professor of Electrical Engineering & Photonics at the Northfield Institute of Technology in Evanston, Illinois, where I have held a tenured faculty appointment since 2009. I am over the age of twenty-one and am otherwise competent to make this declaration. I make this declaration based upon my personal knowledge and my professional opinions, formed as described herein.

2. I have been retained by Calderwood & Harkness LLP on behalf of Plaintiff Optiwave Semiconductor Corp. ("OWS" or "Plaintiff") as a technical and infringement expert in the above-captioned matter. In that capacity, I previously submitted a declaration in support of OWS's Opening Claim Construction Brief on November 15, 2024, which was filed as part of Docket Entry 44 (hereinafter, "my November 15 Declaration" or "my

3. I submit this Supplemental Declaration in support of OWS's Reply Claim Construction Brief, filed concurrently herewith on December 20, 2024. The purpose of this Supplemental Declaration is to respond to certain opinions and arguments set forth in the declaration of Dr. Rajesh Sundaram, which was submitted in support of Defendant Lumicore Technologies, Inc.'s ("Lumicore" or "Defendant") Responsive Claim Constructio

4. I make this declaration under penalty of perjury pursuant to 28 U.S.C. § 1746.

5. I have been compensated at a rate of $950 per hour for my work in this matter, including the time spent reviewing materials, forming opinions, and preparing both my Original Declaration and this Supplemental Declaration. My compensation is not contingent upon the outcome of this litigation or the substance of my opinions. My opinions are based solely on my professional judgment, my review of the relevant technical

II. QUALIFICATIONS AND EXPERTISE

6. My qualifications are set forth in detail in my curriculum vitae, which was attached as Exhibit A to my November 15 Declaration (D.E. 44) and is incorporated herein by reference. I provide a brief summary of my relevant qualifications below.

7. I hold a Ph.D. in Electrical Engineering from the Massachusetts Institute of Technology, where my doctoral research focused on integrated photonics, specifically the design and characterization of silicon photonic waveguide structures for wavelength-division multiplexing applications. I also hold an M.S. in Electrical Engineering from Stanford University and a B.S. in Physics from the University of Michigan, Ann A

8. I have served as a Professor of Electrical Engineering & Photonics at the Northfield Institute of Technology since 2009. My research specializes in several areas directly relevant to the patents-in-suit, including silicon photonic waveguide design, optical transceiver architectures, thermal management of photonic integrated circuits ("PICs"), and grating coupler technologies. I have directed a research laboratory

9. I have over twenty years of experience in the field of silicon photonics. Prior to my academic appointment, I worked as a senior design engineer at Granite Harbor Enterprises from 2003 to 2009, where I contributed to the design of photonic integrated circuits for long-haul optical communication systems.

10. I have published extensively in peer-reviewed journals, including IEEE Photonics Technology Letters, Journal of Lightwave Technology, Optics Express, Nature Photonics, and Optica. I have authored or co-authored over 140 peer-reviewed journal articles and conference proceedings papers relating to silicon photonics and related topics.

11. I am a named inventor on seven United States patents in the field of integrated photonic devices, covering innovations in grating coupler design, waveguide thermal tuning, and photonic transceiver architectures.

12. I have previously been qualified as an expert witness in patent infringement cases involving silicon photonics and optical communications technologies in the United States District Courts for the Northern District of California, the District of Delaware, and the Western District of Texas. In total, I have been retained as a technical expert in eight patent cases and have provided deposition testimony in six of th

13. I am familiar with the four patents asserted by OWS in this litigation: U.S. Patent No. 10,234,847 ("the '847 Patent"), U.S. Patent No. 10,891,193 ("the '193 Patent"), U.S. Patent No. 9,678,562 ("the '562 Patent"), and U.S. Patent No. 11,402,015 ("the '015 Patent"). I have reviewed the complete specifications, claims, figures, and prosecution histories of each of these patents, as well as the prior art of record,

III. PURPOSE AND SCOPE OF SUPPLEMENTAL DECLARATION

14. This Supplemental Declaration responds specifically to opinions and arguments set forth in the declaration and report of Dr. Rajesh Sundaram, Professor of Electrical & Computer Engineering at Pacific Western University, San Diego, California, which was submitted in support of Lumicore's Responsive Claim Construction Brief filed December 6, 2024 (D.E. 48) (hereinafter, "Dr. Sundaram's Declaration" or "the Sundaram

15. In particular, this Supplemental Declaration addresses three categories of issues: (a) Dr. Sundaram's proposed definition of a person of ordinary skill in the art ("POSITA"), which is improperly narrow and results in an elevated baseline of knowledge that distorts the claim-construction analysis; (b) Dr. Sundaram's improper reliance on extrinsic evidence — including post-filing-date journal articles, general-purp

16. This Supplemental Declaration supplements but does not replace my November 15 Declaration. All opinions expressed in my Original Declaration remain in full force, and I incorporate them by reference herein.

17. In forming the opinions expressed in this Supplemental Declaration, I reviewed the following materials: (a) The Declaration of Dr. Rajesh Sundaram filed December 6, 2024, in support of Lumicore's Responsive Claim Construction Brief (D.E. 48); (b) Lumicore's Responsive Claim Construction Brief (D.E. 48, filed December 6, 2024); (c) The Joint Claim Construction Statement (D.E. 40, filed October 28, 2024), which ide

18. I reserve the right to supplement the materials reviewed and the opinions expressed herein as additional information becomes available in the course of this litigation.

V. RESPONSE TO DR. SUNDARAM'S PROPOSED POSITA DEFINITION A. Dr. Sundaram's Proposed POSITA Definition

19. In paragraphs 14–18 of his declaration, Dr. Sundaram defines a person of ordinary skill in the art ("POSITA") for purposes of construing the claims of the asserted patents. Specifically, Dr. Sundaram proposes that a POSITA is: "An individual holding a Ph.D. in electrical engineering, photonics, or physics, with at least five (5) years of direct industry experience specifically in the design and fabrication of sil

20. This proposed POSITA definition is significantly more restrictive than the definition I proposed in my November 15 Declaration and, as I explain below, does not accurately reflect the level of ordinary skill in the art during the relevant time periods. B. Dr. Ashford's POSITA Definition (Restated)

21. As set forth in paragraphs 21–25 of my November 15 Declaration, I defined a POSITA as: "A person holding a Master of Science (M.S.) degree or a Doctor of Philosophy (Ph.D.) degree in electrical engineering, photonics, or a closely related field, with at least three (3) years of experience in silicon-photonic integrated circuit design."

22. I continue to believe that this definition accurately reflects the actual level of skill in the art at the relevant time periods, which span from November 22, 2014 (the filing date of the '562 Patent) to August 30, 2019 (the filing date of the '015 Patent). This definition encompasses the broad community of engineers, researchers, and designers who were actively working in the silicon-photonics field during those

23. Dr. Sundaram's proposed POSITA definition is improperly narrow in at least four respects, each of which I address in turn.

24. Ph.D. Requirement. Dr. Sundaram's requirement that a POSITA hold a Ph.D. degree excludes a substantial population of practitioners who were actively working in the silicon-photonics field during the relevant time periods. In my experience, both as an academic researcher who has trained graduate students and as a former industry engineer, many engineers holding M.S. degrees in electrical engineering or photonics w

25. Five-Year Industry Experience Requirement. Dr. Sundaram's requirement of at least five years of "direct industry experience" further narrows the POSITA pool in a manner that is unsupported by the patents themselves or the state of the art. During the relevant time periods, the silicon-photonics industry was experiencing rapid growth and attracting engineers and researchers with varied backgrounds and levels of ex

28. The Patent Specifications Confirm the Broader POSITA. The specifications of the asserted patents themselves are written at a level accessible to someone with an M.S. degree and three years of relevant experience. The patents use standard terminology from the silicon-photonics field, cite widely available prior art, and describe their inventions using conventional engineering concepts and well-known fabrication te

29. The Prosecution Histories Confirm the Broader POSITA. The prosecution histories of the four asserted patents reflect a level of technical discourse consistent with my proposed POSITA definition. The examiner's office actions, the applicant's responses, and the prior art cited during prosecution all address the claimed inventions at a level of technical detail that an engineer with an M.S. degree and three years o

30. The POSITA definition is not merely an academic exercise; it directly affects the construction of all twelve disputed claim terms in this case. The ordinary and customary meaning of each disputed term is assessed from the perspective of a person of ordinary skill in the art at the time of the invention. See Phillips v. AWH Corp., 415 F.3d 1303, 1313 (Fed. Cir. 2005) (en banc). An improperly elevated POSITA defini

31. First, an elevated POSITA may be attributed specialized knowledge that causes the POSITA to read claim terms narrowly based on advanced expertise or industry-specific conventions that are not reflected in the patent itself. For example, a Ph.D. with five years of commercial foundry experience might colloquially use the term "integrated" to refer only to monolithic fabrication, whereas the broader silicon-photonic

32. Second, an elevated POSITA may attribute to the skilled artisan specialized knowledge that makes claimed features seem conventional or obvious, thereby indirectly affecting validity analyses. While validity is not presently before the Court, the POSITA definition adopted at the claim-construction stage carries forward to every subsequent phase of the case.

33. As I explain in detail in Sections VI and VII below, Dr. Sundaram's elevated POSITA definition is a driving force behind his improperly narrow proposed constructions of the four disputed terms at issue. In each instance, his proposed construction reflects the specialized perspective of a highly credentialed foundry engineer rather than the ordinary understanding of the broader community of skilled practitioners i

VI. RESPONSE TO DR. SUNDARAM'S IMPROPER RELIANCE ON EXTRINSIC EVIDENCE A. General Principles

34. It is well established that claim construction begins and, where possible, ends with the intrinsic evidence: the claim language, the specification (including the written description and any drawings), and the prosecution history. See Phillips v. AWH Corp., 415 F.3d 1303, 1314–17 (Fed. Cir. 2005) (en banc). The intrinsic evidence is the most significant source of the legally operative meaning of disputed claim ter

35. Extrinsic evidence — including expert testimony, technical dictionaries, treatises, and learned publications — may be considered by the Court to the extent it aids in understanding the technology and the meaning of terms as understood by persons of ordinary skill in the art. However, extrinsic evidence may not be used to contradict the meaning established by the intrinsic record, and it may not be used to import

36. In my professional opinion, Dr. Sundaram's declaration improperly elevates extrinsic evidence over the intrinsic record in several critical respects. For each of the four disputed terms addressed in this declaration, Dr. Sundaram relies on extrinsic sources — including textbooks, journal articles, technical dictionaries, IEEE standards documents, and industry whitepapers — to propose constructions that are narrow

37. Dr. Sundaram proposes that the term "waveguide multiplexer," as used in the claims of the '847 Patent, should be construed to mean "an arrayed waveguide grating that combines optical signals using a slab coupler and phase-shifted waveguide array." (Sundaram Decl. ¶ 29.) In support of this proposed construction, Dr. Sundaram cites a definition from Photonic Devices and Systems: A Comprehensive Reference (Predding

38. Dr. Sundaram's proposed construction is improperly narrow for several reasons.

39. First, the construction excludes other well-known types of waveguide-based multiplexers — including ring-resonator-based multiplexers, cascaded Mach-Zehnder interferometer-based multiplexers, and echelle-grating-based multiplexers — that were recognized in the art during the relevant time period and that the '847 Patent specification expressly contemplates. As shown in Exhibit B to this declaration, the '847 Pate

40. This language is unambiguous. The specification expressly states that the "waveguide multiplexer" is not limited to any single architecture and identifies three different types of multiplexer architectures by name. Dr. Sundaram's proposed construction, which limits the term to "an arrayed waveguide grating," contradicts this express specification language.

41. Second, the prosecution history of the '847 Patent contains no narrowing amendment or argument that would limit the term "waveguide multiplexer" to arrayed waveguide gratings. At no point during prosecution did the applicant disclaim or disavow coverage of ring-resonator-based or Mach-Zehnder-based multiplexers. The absence of any such prosecution history disclaimer further confirms that the broad, generic meanin

42. Third, Dr. Sundaram's reliance on the Predding & Knights textbook definition is problematic because the 2015 third edition of that textbook postdates the '847 Patent's September 14, 2016 filing date by only one year but reflects a more specialized usage of "waveguide multiplexer" that had evolved in certain academic contexts and does not represent the ordinary meaning of the term at the time of the invention. Mor

43. Fourth, Dr. Sundaram cites the Pathak et al. article on arrayed waveguide grating design, but that article was published in 2018 — nearly two years after the '847 Patent's September 14, 2016 filing date. Reliance on a post-filing-date reference to define the scope of a claim term is inherently suspect because it may reflect developments, refinements, or shifts in terminology that occurred after the relevant date.

44. For these reasons, OWS's proposed construction — "an optical device that combines multiple optical signals of different wavelengths onto a single waveguide" — is the construction that faithfully reflects the intrinsic record. This construction captures the functional essence of a waveguide multiplexer as described in the '847 Patent specification without improperly limiting the term to a single architectural impl

45. Dr. Sundaram proposes that the term "integrated on a silicon substrate," as used in the claims of the '193 Patent, should be construed to mean "monolithically fabricated on a single silicon die without hybrid bonding or heterogeneous integration." (Sundaram Decl. ¶ 39.) In support of this proposed construction, Dr. Sundaram relies on an IEEE standards document (IEEE Standard 802.3bs-2017) and an industry whitepap

46. This proposed construction is directly contradicted by the '193 Patent specification itself.

47. The '193 Patent, filed April 7, 2017 (claiming priority to Provisional Application No. 62/499,117, filed the same date) and issued January 12, 2021, describes multiple approaches to integrating optical and electronic components on a silicon substrate. As shown in Exhibit C to this declaration, Column 4, lines 32–45 of the '193 Patent specification states: "In certain embodiments, active gain elements comprising I

48. This passage expressly describes hybrid bonding as a form of integration "onto the silicon substrate." Dr. Sundaram's proposed construction, which excludes "hybrid bonding or heterogeneous integration," directly contradicts this specification language. A construction that excludes subject matter expressly described in the patent specification as falling within the scope of the invention is improper under well-est

49. Furthermore, the prosecution history of the '193 Patent does not contain any disclaimer, disavowal, or narrowing amendment regarding the mode of integration. The term "integrated on a silicon substrate" was present in the original claims as filed and was never amended or narrowed during prosecution. The examiner did not raise any issue with respect to the breadth of the term "integrated," and the applicant made n

50. Dr. Sundaram's reliance on IEEE Standard 802.3bs-2017 is also misplaced. IEEE standards are voluntary, industry-consensus documents that define technical requirements for interoperability purposes. They are not authoritative sources for the construction of patent claim terms, and the fact that an IEEE standard may use the term "integrated" in a particular way does not control or even meaningfully inform the const

51. Similarly, Dr. Sundaram's reliance on the industry whitepaper is problematic because the whitepaper represents the views of a particular industry consortium and does not establish the ordinary meaning of the term "integrated" as understood by the broader community of persons of ordinary skill in the art. The whitepaper's distinction between "monolithic integration" and "hybrid integration" as separate categories

52. For these reasons, OWS's proposed construction — "formed on or within a silicon-based wafer using semiconductor fabrication processes" — is the construction that faithfully reflects the specification's breadth and is consistent with how a POSITA would understand the term. 3. "Micro-Channel Heat Sink" (the '562 Patent).

53. Dr. Sundaram proposes that the term "micro-channel heat sink," as used in the claims of the '562 Patent, should be construed to mean "a closed-loop liquid-cooling system with channels having a hydraulic diameter between 10 µm and 200 µm." (Sundaram Decl. ¶ 47.) In support of this construction, Dr. Sundaram cites a thermal-engineering reference work — specifically, Tuckerman & Pease, "High-Performance Heat Sinking

54. Dr. Sundaram's proposed construction is improperly narrow in two respects: it requires (a) a "closed-loop liquid-cooling system" and (b) channels with a hydraulic diameter "between 10 µm and 200 µm." Neither limitation is supported by the intrinsic record.

55. As to the closed-loop requirement, the '562 Patent specification, filed November 22, 2014 and issued June 13, 2017, expressly describes both passive and active micro-channel configurations. As shown in Exhibit D to this declaration, Column 6, lines 12–28 of the '562 Patent specification states: "In one embodiment, the micro-channel heat sink comprises a passive micro-channel structure in which heat generated by t

56. This passage makes clear that the patent contemplates both passive (heat conduction without active fluid circulation) and active (liquid-cooled) micro-channel configurations. Dr. Sundaram's proposed construction, which requires a "closed-loop liquid-cooling system," would exclude the passive micro-channel embodiment expressly described in the specification. This is improper.