Contract analysis

I. DEPOSITION OVERVIEW The deposition of Kevin Ng was taken on January 7, 2025, at the offices of Calderwood & Harkness LLP, 350 South Grand Avenue, 48th Floor, Los Angeles, California 90071. Mr. Ng appeared in person as a fact witness in connection with his role as Lead Engineer at Benchmark Semiconductor Analysis, LLC, the firm retained by Optiwave Semiconductor Corp. ("OWS") to perform reverse-engineering teardown

II. WITNESS BACKGROUND AND QUALIFICATIONS A. Professional Background Kevin Ng currently holds the position of Lead Engineer at Benchmark Semiconductor Analysis, LLC ("Benchmark"), located at 2244 Mission College Boulevard, Santa Clara, California 95054. Mr. Ng has approximately fourteen years of experience in the semiconductor analysis and failure-analysis industry, with particular expertise in reverse engineering, t

III. ENGAGEMENT AND RETENTION BY OWS A. Initial Retention Mr. Ng testified that Benchmark was retained by Optiwave Semiconductor Corp. in November 2022 at the direction of Rebecca Tanaka, OWS's General Counsel. The stated purpose of the retention was to perform a reverse-engineering teardown of Lumicore Technologies, Inc.'s LumiLink 400G-ZR+ transceiver module in order to evaluate potential patent infringement. The e

1. LumiLink 400G-ZR+ — This was the initial teardown project, completed on December 12, 2022. The teardown report was marked as Exhibit Ng-20.

2. LumiLink 800G-DR8 — This was a follow-on teardown project initiated after the Q1 2023 commercial launch of the 800G-DR8 product. The teardown was completed in approximately June 2023. The teardown report was marked as Exhibit Ng-21.

3. LumiEdge 1600G-LR — This was the third teardown project, initiated after the Q4 2023 commercial launch of the 1600G-LR product. The teardown was completed in approximately February 2024. The teardown report was marked as Exhibit Ng-22. Each of the three teardown projects involved a comprehensive suite of analytical techniques, including physical disassembly of the transceiver module, optical microscopy and electro

IV. CHAIN OF CUSTODY — ACCUSED PRODUCT SAMPLES A. LumiLink 400G-ZR+ Sample Mr. Ng testified that the LumiLink 400G-ZR+ sample was acquired by OWS's engineering team through a commercial purchase made in approximately October to November 2022. The sample was delivered to Benchmark's Santa Clara laboratory accompanied by a commercial invoice documenting the purchase and in what appeared to be the original Lumicore prod

V. TEARDOWN METHODOLOGY A. General Methodology Mr. Ng described in detail Benchmark's standard teardown protocol for photonic integrated circuit (PIC) modules. He testified that the methodology is designed to systematically characterize the external and internal structures of the device under test while preserving the integrity of the analysis through comprehensive documentation at each stage. Benchmark's standard op

1. Non-destructive external inspection and photography. The module is photographed from all angles using high-resolution macro imaging equipment. External dimensions, labeling, and markings are documented. This step establishes the baseline condition of the sample before any physical manipulation.

2. X-ray inspection of internal component layout. The sealed module is subjected to X-ray imaging to obtain a preliminary understanding of the internal component arrangement, interconnections, and die positioning without opening the device. This step allows the engineering team to plan the subsequent disassembly approach and identify areas of particular analytical interest.

3. Controlled disassembly. The module housing is carefully opened using precision tools. Components including the lid, heat sink, fiber-optic connectors, and any internal mounting hardware are removed in a controlled sequence. Each component is catalogued, photographed, and stored separately with traceable labeling.

4. Optical microscopy of exposed PIC die and associated electronics. Following disassembly, the exposed photonic integrated circuit die and any associated electronic integrated circuits (e.g., DSP chips, driver ICs, transimpedance amplifiers) are examined under optical microscopy at varying magnification levels. Initial observations of waveguide routing, grating structures, modulators, photodetectors, and other photo

5. Scanning electron microscopy (SEM) at multiple magnification levels. The PIC die and selected structures are imaged using SEM to obtain high-resolution surface topography images. SEM imaging is conducted at magnification levels ranging from approximately 50x to 100,000x, depending on the structures of interest. Dimensional measurements of specific features are taken using the SEM's calibrated measurement tools.

6. Focused ion beam (FIB) cross-sectioning of specific structures of interest. FIB milling is used to create precision cross-sections through targeted structures, including waveguide structures, grating couplers, and thermal management channels. Cross-sections are imaged using SEM to reveal the subsurface geometry and layer structure of the analyzed features.

7. Chemical delayering to expose subsurface layers of the silicon photonic die. Controlled chemical etching processes are employed to selectively remove specific material layers from the die surface, exposing underlying waveguide layers, metallization patterns, and other subsurface structures for further imaging and analysis.

8. Energy-dispersive X-ray spectroscopy (EDS) for material composition analysis. EDS is performed in conjunction with SEM imaging to determine the elemental composition of specific structures and materials within the device. This technique is used to confirm the material identity of waveguide cladding layers, thermal management channel walls, metallization, and other components.

9. Functional testing of optical performance characteristics. Where feasible on partially disassembled units, functional testing is performed to measure optical performance parameters such as insertion loss, coupling efficiency, polarization-dependent loss, and thermal dissipation characteristics. Mr. Ng noted that functional testing is not always possible depending on the extent of disassembly required and the speci

10. Documentation and reporting. All observations, measurements, images, and analytical data are compiled into a comprehensive teardown report. The report includes annotated images identifying specific structures of interest, measurement data with uncertainty analysis, and a summary of key findings. B. Equipment Used Mr. Ng identified the specific analytical equipment used in the teardown analyses. Benchmark's SEM is

VI. TEARDOWN FINDINGS — LUMILINK 400G-ZR+ A. Waveguide Multiplexer Structures ('847 Patent) Mr. Ng testified that the teardown analysis of the LumiLink 400G-ZR+ revealed the presence of a multi-channel silicon photonic waveguide multiplexer on the PIC die. This structure functions to combine multiple optical signals of different wavelengths onto a single output waveguide. Mr. Ng described the observed structure as co

VII. TEARDOWN FINDINGS — LUMILINK 800G-DR8 A. Waveguide Multiplexer Structures ('847 Patent) Mr. Ng testified that the teardown analysis of the LumiLink 800G-DR8 revealed a multi-channel waveguide multiplexer architecture similar to that observed in the 400G-ZR+. The 800G-DR8 multiplexer incorporates additional channels relative to the 400G-ZR+ design in order to support the higher aggregate bandwidth of the 800G pla

VIII. TEARDOWN FINDINGS — LUMIEDGE 1600G-LR A. Coherent Optical Transceiver on Silicon Substrate ('193 Patent) Mr. Ng identified a coherent optical transceiver integrated on a silicon substrate within the LumiEdge 1600G-LR module. The architecture is similar to that observed in the 400G-ZR+ and 800G-DR8 products but has been further scaled to support 1600G operation with additional parallelism and higher per-channel

IX. CLAIM-LIMITATION MAPPING — CROSS-REFERENCE TO INFRINGEMENT CONTENTIONS Mr. Ng testified that he worked with OWS's litigation counsel at Calderwood & Harkness LLP and with Dr. Caroline Ashford, OWS's retained technical and infringement expert (Professor of Electrical Engineering and Photonics at the Northfield Institute of Technology), to map the teardown findings from all three accused products to specific claim

X. CROSS-EXAMINATION BY DEFENDANT'S COUNSEL A. Scope of Ng's Opinions During cross-examination, Ms. Briggs clarified the nature and scope of Mr. Ng's testimony. She established that Mr. Ng is testifying in this case as a fact witness — specifically, as the percipient engineer who conducted and supervised the teardown analyses of the three accused products — and not as a retained expert witness rendering legal or tech

XI. EXHIBITS MARKED DURING DEPOSITION The following twenty-seven exhibits were marked during the deposition of Kevin Ng on January 7, 2025:

XII. KEY TAKEAWAYS AND ASSESSMENTS A. Strengths of Ng's Testimony Mr. Ng was clear, methodical, and well-prepared throughout the approximately six-hour deposition. He presented as a highly credible fact witness with extensive experience in semiconductor reverse engineering and teardown analysis. His testimony was precise and consistent, and he demonstrated a thorough command of the technical details of each teardown

XIII. FOLLOW-UP ACTIONS The following action items have been identified based on the deposition of Kevin Ng: • [ ] Trial witness preparation. Prepare Mr. Ng for potential trial testimony, anticipated to be presented live or by video deposition. Coordinate with Wendy Schultz on the witness preparation timeline, with preparation sessions anticipated in approximately January 2026 in advance of the currently scheduled tr