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Contract analysis / exhibit-b-193-patent.docx
exhibit-b-193-patent.docx
1014-00004 · 31 clauses
High · 1 Medium · 0 Standard · 2
1. Overall Transceiver Architecture Standard
⚑ Commercial term
1. Overall Transceiver Architecture Referring to FIG. 1, a coherent optical transceiver 100 in accordance with an embodiment of the present invention is integrated on a silicon substrate 102 and comprises a transmitter section 110 and a receiver section 120 disposed on the single silicon substrate 102. The silicon substrate 102 is preferably a silicon-on-insulator (SOI) wafer comprising a silicon device layer, a buri
2. The Coherent Detection Module
2. The Coherent Detection Module Referring to FIG. 3, the coherent detection module 130 is described in detail. The coherent detection module 130 is a key functional element of the receiver section 120 and is configured to enable full recovery of both the amplitude and phase information encoded in the incoming coherent optical signal across both orthogonal polarization states. The coherent detection module 130 compri
3. Silicon-Based Modulator Array
3. Silicon-Based Modulator Array Referring to FIG. 4, the modulator array 116 is described in detail. The modulator array 116 comprises a plurality of carrier-depletion-type silicon Mach-Zehnder modulators (MZMs) formed on the silicon substrate 102. Each MZM includes a pair of waveguide arms with P-N junction phase shifters embedded in the waveguide core. When a reverse-bias voltage is applied across the P-N junction
4. Local Oscillator Laser Interface
4. Local Oscillator Laser Interface Referring to FIG. 5, the local oscillator (LO) interface 140 is described. The LO interface 140 provides the means for coupling a local oscillator laser to the silicon photonic chip for use as the optical reference in the coherent detection process. The present invention contemplates several alternative implementations of the LO interface 140, each suitable for different applicatio
5. Integration on Silicon Substrate
5. Integration on Silicon Substrate The silicon substrate 102 on which the coherent optical transceiver 100 is integrated preferably comprises a silicon-on-insulator (SOI) wafer. Referring to FIG. 2, the SOI wafer includes a silicon device layer 202 having a thickness of approximately 220 nm, a buried oxide (Box) layer 204 having a thickness of approximately 2 µm, and a silicon handle wafer 206 having a thickness of
6. Digital Signal Processing
6. Digital Signal Processing Referring to FIG. 8, the DSP unit 150 is described. The DSP unit 150 performs the signal processing functions necessary for coherent signal recovery in the receiver path and signal conditioning in the transmitter path. In the receiver path, the DSP unit 150 receives digitized electrical signals from analog-to-digital converters (ADCs) 152 connected to the outputs of the balanced photodete
7. Thermal Management
7. Thermal Management The integrated coherent optical transceiver 100 incorporates thermal management features to ensure stable operation under the power densities and operating conditions typical of pluggable transceiver modules deployed in high-density data-center environments. The thermal management approach for the transceiver 100 is designed to maintain the temperature of critical components—particularly the las
8. Performance Results High
⚑ Penalty / liquidated damages
8. Performance Results In an exemplary embodiment, the integrated coherent optical transceiver 100 of the present invention has been demonstrated to achieve 400 gigabits per second (Gbps) per channel coherent transmission over 80 km of standard single-mode fiber (SSMF) with a bit-error rate (BER) below the pre-FEC threshold of 2 × 10⁻². Referring to FIG. 7, the measured BER as a function of optical signal-to-noise ra
9. Manufacturing Process
9. Manufacturing Process Referring to FIG. 10, the fabrication process for the integrated coherent transceiver 100 is described. The manufacturing process employs a CMOS-compatible fabrication flow that can be executed in a standard silicon photonics foundry with the addition of heterogeneous integration process steps for laser integration. The major process steps are as follows: (Step 1) SOI Wafer Preparation. A sil
1. A coherent optical transceiver integrated on a silicon substrate, comprising:
1. A coherent optical transceiver integrated on a silicon substrate, comprising: a coherent detection module configured to receive an optical signal and a local oscillator signal, the coherent detection module comprising at least one 90-degree optical hybrid and a plurality of balanced photodetectors; a modulator array formed on the silicon substrate, the modulator array comprising a plurality of Mach-Zehnder modulat
2. The transceiver of claim 1, wherein the balanced photodetectors comprise germanium phot
2. The transceiver of claim 1, wherein the balanced photodetectors comprise germanium photodetectors formed on the silicon substrate.
3. The transceiver of claim 1, wherein the coherent detection module further comprises a p
3. The transceiver of claim 1, wherein the coherent detection module further comprises a polarization beam splitter and a polarization rotator configured to process both TE and TM polarization components of the received optical signal.
4. The transceiver of claim 1, wherein the modulator array comprises nested Mach-Zehnder m
4. The transceiver of claim 1, wherein the modulator array comprises nested Mach-Zehnder modulators configured to generate a dual-polarization quadrature phase-shift keying (DP-QPSK) signal.
5. The transceiver of claim 1, wherein the modulator array comprises nested Mach-Zehnder m
5. The transceiver of claim 1, wherein the modulator array comprises nested Mach-Zehnder modulators configured to generate a dual-polarization 16-quadrature amplitude modulation (DP-16QAM) signal.
6. The transceiver of claim 1, wherein the local oscillator interface comprises a hybrid b
6. The transceiver of claim 1, wherein the local oscillator interface comprises a hybrid bonding region for attaching a III-V semiconductor laser die to the silicon substrate.
7. A method for coherent optical communication, comprising:
7. A method for coherent optical communication, comprising: receiving an optical signal at a coherent detection module integrated on a silicon substrate, the coherent detection module comprising at least one 90-degree optical hybrid; mixing the received optical signal with a local oscillator signal in the coherent detection module to produce electrical signals representative of in-phase and quadrature components of t
8. The method of claim 7, wherein the step of mixing comprises splitting the received opti
8. The method of claim 7, wherein the step of mixing comprises splitting the received optical signal into two orthogonal polarization components and mixing each polarization component separately with the local oscillator signal.
9. The method of claim 7, further comprising compensating for chromatic dispersion and pol
9. The method of claim 7, further comprising compensating for chromatic dispersion and polarization mode dispersion in the digital signal processing unit.
10. A silicon photonic integrated circuit for coherent optical transceiver applications, c
10. A silicon photonic integrated circuit for coherent optical transceiver applications, comprising: a silicon-on-insulator substrate; a transmitter section formed on the substrate, the transmitter section comprising at least one optical modulator; a receiver section formed on the substrate, the receiver section comprising a coherent detection module with at least one optical hybrid and balanced photodetectors; a wav
11. The circuit of claim 10, wherein the at least one optical modulator comprises a carrie
11. The circuit of claim 10, wherein the at least one optical modulator comprises a carrier-depletion silicon Mach-Zehnder modulator with an electro-optic bandwidth of at least 35 GHz.
12. The circuit of claim 10, wherein the balanced photodetectors have a responsivity of at
12. The circuit of claim 10, wherein the balanced photodetectors have a responsivity of at least 0.8 A/W at a wavelength of 1550 nm.
13. The circuit of claim 10, further comprising a spot-size converter at the at least one
13. The circuit of claim 10, further comprising a spot-size converter at the at least one optical input/output port for edge coupling to an optical fiber.
14. The circuit of claim 10, further comprising an integrated wavelength-division multiple
14. The circuit of claim 10, further comprising an integrated wavelength-division multiplexer for combining multiple channel signals onto a single output waveguide.
15. A coherent optical transceiver module, comprising:
15. A coherent optical transceiver module, comprising: a silicon photonic chip; means for coherently detecting an incoming optical signal on the silicon photonic chip; means for modulating an outgoing optical signal on the silicon photonic chip; a local oscillator laser optically coupled to the silicon photonic chip; and a digital signal processing integrated circuit electrically connected to the silicon photonic chi
16. The module of claim 15, wherein the silicon photonic chip and the digital signal proce
16. The module of claim 15, wherein the silicon photonic chip and the digital signal processing integrated circuit are co-packaged on a common substrate or interposer.
17. The module of claim 15, wherein the local oscillator laser is a narrow-linewidth tunab
17. The module of claim 15, wherein the local oscillator laser is a narrow-linewidth tunable laser with a linewidth of less than 100 kHz.
18. The module of claim 15, wherein the module is configured to fit within a QSFP-DD or OS
18. The module of claim 15, wherein the module is configured to fit within a QSFP-DD or OSFP pluggable form factor.
19. A system for data-center optical interconnection, comprising:
19. A system for data-center optical interconnection, comprising: a plurality of coherent optical transceiver modules according to claim 15, interconnected via optical fibers, and configured for wavelength-division-multiplexed coherent transmission.
20. The system of claim 19, wherein each transceiver module supports at least four wavelen
20. The system of claim 19, wherein each transceiver module supports at least four wavelength channels.
21. The system of claim 19, further comprising a network switch configured to dynamically
21. The system of claim 19, further comprising a network switch configured to dynamically allocate wavelength channels among the transceiver modules.
22. A method for fabricating an integrated coherent transceiver on a silicon substrate, co Standard
⚑ Commercial term
22. A method for fabricating an integrated coherent transceiver on a silicon substrate, comprising: providing a silicon-on-insulator wafer comprising a silicon device layer, a buried oxide layer, and a silicon handle wafer; patterning waveguide structures in the silicon device layer using lithographic processes to define a transmitter section and a receiver section; forming at least one Mach-Zehnder modulator in the