Contract analysis

1. Overview of Modulator Architecture Referring now to FIGS. 1 and 6, the present invention provides a silicon-photonics integrated circuit (PIC) fabricated on a silicon-on-insulator (SOI) platform. The PIC comprises a plurality of parallel Mach-Zehnder modulator (MZM) channels arranged on a common substrate. In a preferred embodiment, four MZM channels are provided, although alternative embodiments may include two,

2. Segmented Traveling-Wave Electrode Structure Referring now to FIG. 2 and FIG. 3A, each MZM arm is driven by a segmented traveling-wave electrode (TWE) structure. The segmented TWE comprises N electrode segments (where N is an integer of at least 3, and preferably 4 to 8) arranged in series along the longitudinal direction of the modulator arm. In a preferred embodiment, the segmented TWE comprises six electrode se

3. Tapered Impedance-Matching Transition Regions Referring now to FIG. 3B, FIG. 4, and FIG. 7, the present invention provides tapered impedance-matching transition regions between each pair of adjacent electrode segments. This feature constitutes the key inventive contribution of the present disclosure and distinguishes the present invention from prior art segmented TWE designs. Between each pair of adjacent electrod

4. Variable Segment Length Optimization The non-uniform segment lengths described above are determined through an optimization methodology that seeks to match the RF phase velocity along the electrode to the optical group velocity in the waveguide at each longitudinal position. The RF phase velocity v_RF is given by: vRF = c / (εeff)^(1/2) where c is the speed of light in vacuum and εeff is the effective dielectric c

5. Multi-Channel Integration Referring now to FIG. 6, the present invention provides a multi-channel MZM array integrated on a single silicon-photonics die. In the preferred embodiment, four MZM channels are provided, arranged in a parallel configuration on the die. The die has approximate dimensions of 5 mm × 12 mm, which is compatible with standard photonic integrated circuit packaging and co-packaged optics form f

6. Fabrication Process Overview Referring now to FIG. 8, the fabrication of the silicon-photonic MZM with segmented TWE and tapered impedance-matching transitions is performed using a standard silicon-photonics process flow on an SOI substrate. The process flow comprises the following principal steps: Step 1: Substrate Preparation. An SOI substrate is provided, having a silicon device layer with a thickness of approx

7. Performance Characteristics The performance of the inventive silicon-photonic MZM with segmented TWE and tapered impedance-matching transitions has been characterized through electromagnetic simulation and photonic circuit simulation. The key performance metrics are summarized below with reference to FIGS. 5 and 9. Electro-Optic Bandwidth. The simulated electro-optic 3-dB bandwidth of the inventive modulator is ap

8. Alternative Embodiments The present invention is not limited to the specific embodiments described above and illustrated in the drawings. Various alternative embodiments are contemplated within the scope of the present invention, including but not limited to the following: Two-Channel Embodiment. In an alternative embodiment, two MZM channels are provided on a single die for an aggregate data rate of 800G. This tw

1. A silicon-photonic Mach-Zehnder modulator, comprising: a silicon-on-insulator substrate; a Mach-Zehnder interferometer formed in a silicon waveguide layer on the substrate, the Mach-Zehnder interferometer comprising a first arm and a second arm, each of the first arm and the second arm including an electro-optic phase shifter; a segmented traveling-wave electrode disposed over at least one of the first arm and the

2. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein each tapered impedance-matching transition region has a taper length of between 50 µm and 200 µm.

3. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the electrode geometry within each tapered impedance-matching transition region varies according to a linear taper profile.

4. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the electrode geometry within each tapered impedance-matching transition region varies according to a Klopfenstein taper profile.

5. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the characteristic impedance of the segmented traveling-wave electrode deviates by no more than 2 Ω from a target impedance of 50 Ω within each tapered impedance-matching transition region.

6. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the plurality of electrode segments comprises at least four electrode segments having non-uniform segment lengths.

7. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the electro-optic phase shifter comprises a PN junction formed in a silicon waveguide of the silicon waveguide layer.

8. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the modulator has an electro-optic 3-dB bandwidth of at least 67 GHz.

9. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein a half-wave voltage (Vπ) of the modulator is less than 3.5 V at DC.

10. A multi-channel silicon-photonic integrated circuit, comprising: a silicon-on-insulator substrate; a plurality of Mach-Zehnder modulator channels formed on the silicon-on-insulator substrate, each Mach-Zehnder modulator channel comprising a Mach-Zehnder interferometer having a first phase-shifting arm and a second phase-shifting arm; and for each Mach-Zehnder modulator channel, a segmented traveling-wave electrod

11. The multi-channel silicon-photonic integrated circuit of claim 10, wherein the plurality of Mach-Zehnder modulator channels comprises four Mach-Zehnder modulator channels configured for an aggregate data rate of 1.6 Tbps.

12. The multi-channel silicon-photonic integrated circuit of claim 10, wherein each Mach-Zehnder modulator channel is configured for PAM-4 modulation at a symbol rate of at least 100 Gbaud.

13. The multi-channel silicon-photonic integrated circuit of claim 10, wherein the plurality of Mach-Zehnder modulator channels are arranged at a channel pitch of 250 µm.

14. The multi-channel silicon-photonic integrated circuit of claim 10, wherein each of the (N−1) tapered impedance-matching transition regions is defined by a monotonic variation in both the electrode width and the gap spacing between the segmented traveling-wave electrode and the ground plane.

15. The multi-channel silicon-photonic integrated circuit of claim 10, wherein each of the N electrode segments has a segment length selected to achieve velocity matching between an RF signal propagating along the segmented traveling-wave electrode and an optical mode propagating in a waveguide of the at least one of the first phase-shifting arm and the second phase-shifting arm.

16. The multi-channel silicon-photonic integrated circuit of claim 15, wherein the segment lengths of the N electrode segments are non-uniform.

17. The multi-channel silicon-photonic integrated circuit of claim 10, wherein a characteristic impedance of each tapered impedance-matching transition region remains within ±2 Ω of 50 Ω throughout the tapered impedance-matching transition region.

18. A method of fabricating a silicon-photonic Mach-Zehnder modulator, comprising: providing a silicon-on-insulator substrate; forming a Mach-Zehnder interferometer in a silicon waveguide layer of the silicon-on-insulator substrate; depositing a metal layer over a dielectric cladding layer disposed on the silicon-on-insulator substrate; and patterning the metal layer in a single lithographic step to define a segmente

19. The method of claim 18, wherein the patterning comprises defining each tapered impedance-matching transition region and the plurality of electrode segments using a single photolithographic mask.

20. The method of claim 18, wherein the metal layer comprises aluminum having a thickness of approximately 1.5 µm.

21. The method of claim 18, further comprising forming a PN junction in the silicon waveguide layer by ion implantation prior to depositing the metal layer.

22. The method of claim 18, wherein a taper length of each tapered impedance-matching transition region is between 80 µm and 150 µm.

23. The method of claim 18, wherein the plurality of electrode segments comprises six electrode segments having variable segment lengths.

24. The method of claim 18, wherein the silicon-on-insulator substrate has a silicon device layer with a thickness of approximately 220 nm and a buried oxide layer with a thickness of approximately 2 µm.

25. A method of modulating an optical signal, comprising: providing a silicon-photonic Mach-Zehnder modulator comprising a segmented traveling-wave electrode having a plurality of electrode segments and tapered impedance-matching transition regions disposed between adjacent electrode segments of the plurality of electrode segments; coupling an optical carrier into the silicon-photonic Mach-Zehnder modulator; applying

26. The method of claim 25, wherein the optical carrier is modulated in a PAM-4 format at a baud rate of at least 100 Gbaud.

27. The method of claim 25, wherein the RF data signal is applied to a plurality of independently driven multi-channel Mach-Zehnder modulators disposed on a single die.

28. The method of claim 25, wherein the modulation bandwidth is at least 67 GHz. ASSIGNMENT OF PATENT APPLICATION ASSIGNMENT WHEREAS, the undersigned inventors, Dr. Rajan Menon, Dr. Lena Strickland, Dr. Feng-Yi Chen, and Dr. Arjun Dasgupta (collectively, the "Assignors"), are the original and joint inventors of the invention described and claimed in U.S. Patent Application No. 17/672,204, titled "Multi-Channel Silico

1. We believe that we are the original and joint inventors of the subject matter that is claimed and for which a patent is sought in the above-identified application.

2. We have reviewed and understand the contents of the above-identified application, including the claims, as amended.

3. We acknowledge the duty to disclose to the United States Patent and Trademark Office all inform