[slide 1]
Markman Hearing Demonstratives — Optiwave Semiconductor Corp. v. Lumos Photonics, Inc.
Optiwave Semiconductor Corp. v. Lumos Photonics, Inc.
Case No. 5:22-cv-03417-EJD — U.S. District Court, Northern District of California (San Jose Division)
Claim Construction Hearing — January 30, 2023
Before the Honorable Edward J. Torvelis
Presented by Calderwood & Harkness LLP on behalf of Plaintiff Optiwave Semiconductor Corp.
[slide 2]
Agenda / Hearing Roadmap
I. Technology Overview — Silicon Photonics Fundamentals (Technical Tutorial by Dr. Harold Whitfield)
II. The Patents-in-Suit — Overview and Context
III. Disputed Claim Terms — Patent-by-Patent Analysis (11 terms total)
A. '567 Patent — Integrated Waveguide Coupler (3 disputed terms incl. 'adiabatically coupled')
B. '234 Patent — Germanium Photodetector (2 disputed terms incl. 'continuously varying germanium concentration')
C. '678 Patent — Multi-Channel Optical Transceiver (3 disputed terms incl. 'monolithically formed')
D. '890 Patent — Driver Circuit Architecture (3 disputed terms incl. 'co-integrated')
IV. Application to Accused Products — LumosBridge™ 800G and LumosEdge™ 400ZR+
V. Summary of Proposed Constructions
[slide 3]
The Parties
Plaintiff: Optiwave Semiconductor Corp. (OWS) — fabless silicon photonics IC design company, San Jose, CA; founded 2014; ~620 employees; FY 2022 revenue $187.4M
OWS specializes in coherent optical transceiver chipsets (OWS-400ZR, OWS-800LR) and silicon photonics engines for data center interconnects
OWS patent portfolio: 87 issued U.S. utility patents; 14 pending applications; concentrated in waveguide coupling, Ge-on-Si photodetectors, modulator driver architectures
Chips fabricated by Pinnacle Semiconductor Foundry Co., Ltd. on 45nm SOI process
Defendant: Lumos Photonics, Inc. (Nasdaq: LMPH) — integrated device manufacturer (IDM) of silicon photonics components, Austin, TX; founded 2016; FY 2022 revenue $312.8M
Accused products: LumosBridge™ 800G optical engine and LumosEdge™ 400ZR+ pluggable transceiver
[slide 4]
The Four Patents-in-Suit — Overview
U.S. Patent No. 10,234,567 ('567 Patent) — 'Integrated Waveguide Coupler with Tapered Mode Converter for Silicon Photonics Platforms' — Filed Mar. 14, 2017; Issued Mar. 19, 2019 — Inventors: Dr. Kevin Fong, Dr. Priya Ramanathan, Hideo Tanaka — Asserted Claims: 1, 4, 7, 12, 15
U.S. Patent No. 10,891,234 ('234 Patent) — 'Germanium-on-Silicon Photodetector with Graded Buffer Layer for Enhanced Responsivity' — Filed Sep. 8, 2017; Issued Jan. 14, 2021 — Inventors: Dr. Kevin Fong, Dr. Amara Osei — Asserted Claims: 1, 3, 5, 8, 11
U.S. Patent No. 11,045,678 ('678 Patent) — 'Multi-Channel Optical Transceiver with Integrated Wavelength-Division Multiplexing on Silicon' — Filed Jun. 22, 2018; Issued Jun. 29, 2021 — Inventors: Dr. Priya Ramanathan, Dr. Amara Osei, Liwei Zhang — Asserted Claims: 1, 2, 6, 9, 14
U.S. Patent No. 11,312,890 ('890 Patent) — 'Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators' — Filed Nov. 15, 2018; Issued Apr. 26, 2022 — Inventors: Dr. Kevin Fong, Rajesh Iyer — Asserted Claims: 1, 5, 8, 13
[slide 5]
Technical Tutorial Introduction — Silicon Photonics Fundamentals
Tutorial by Dr. Harold Whitfield, PhD in Electrical Engineering (Photonics), UC Berkeley
Professor Emeritus, UC Santa Barbara — 200+ publications in integrated photonics
Whitfield Technical Consulting Group, Inc., Palo Alto, CA
Purpose: Provide the Court with the scientific background needed to construe the disputed claim terms
Topics: (1) Silicon photonics platform overview; (2) Waveguide coupling and mode conversion; (3) Germanium photodetectors; (4) Monolithic vs. heterogeneous integration; (5) Modulator driver co-integration
[slide 6]
Silicon Photonics Platform — Key Components
[DIAGRAM] Cross-section of a silicon photonics integrated circuit on silicon-on-insulator (SOI) substrate
Key functional blocks: (1) Fiber-to-chip optical coupler (waveguide coupler); (2) Photodetector (converts light to electrical signal); (3) Wavelength-division multiplexer/demultiplexer (WDM); (4) Modulator with driver circuit (encodes data onto light)
Each of the four patents-in-suit covers one of these four key functional blocks
Person of Ordinary Skill in the Art (POSITA): PhD or equivalent experience in electrical engineering, applied physics, or photonics with at least 2 years of experience in silicon photonics IC design
[slide 7]
Waveguide Coupling — Adiabatic vs. Non-Adiabatic Transitions
[DIAGRAM] Adiabatic taper: gradual, continuous change in waveguide cross-section allowing smooth optical mode transition with minimal power loss
[DIAGRAM] Non-adiabatic transition: abrupt change causing excitation of higher-order modes and potential optical power loss
In silicon photonics, 'adiabatic coupling' is widely understood to refer to mode transitions that occur gradually enough to avoid higher-order mode excitation
The term does not inherently impose a requirement of 'continuous' geometry — a POSITA understands that various taper geometries (including segmented designs) can achieve adiabatic performance
Literature and industry usage confirm broad understanding of 'adiabatic' as describing the functional characteristic of the transition, not its geometric profile
[slide 8]
'567 Patent — Claim 1 (Representative Independent Claim)
Claim 1: 'An integrated optical coupler comprising:'
'a tapered silicon waveguide having a tip width of less than 200 nanometers'
'[HIGHLIGHTED] adiabatically coupled to a silicon nitride waveguide layer…'
[Remaining dependent asserted claims: 4, 7, 12, 15 — each adding further limitations]
[ANNOTATED PATENT FIGURE] Fig. 3 of the '567 Patent showing the tapered coupler structure with labeled components
[slide 9]
'567 Patent — Disputed Term: 'Adiabatically Coupled' — Side-by-Side Constructions
OWS's Proposed Construction: 'coupled such that optical mode transitions occur without significant power loss'
Lumos's Proposed Construction: 'coupled through a gradual, continuous taper that prevents excitation of higher-order modes throughout the entire transition region'
Key Difference: OWS's construction is functional — it focuses on the outcome (no significant power loss); Lumos improperly reads in geometric limitations ('gradual, continuous taper') and spatial requirements ('throughout the entire transition region')
Lumos's construction would exclude designs that achieve adiabatic performance through segmented or stepped taper geometries — a result inconsistent with the plain meaning and the specification
[slide 10]
'567 Patent — Intrinsic Evidence Supporting OWS's Construction of 'Adiabatically Coupled'
Specification, Col. 4, ll. 15–28: Describes the coupler as 'adiabatically transitioning optical energy between the silicon waveguide and the silicon nitride waveguide with minimal insertion loss'
Specification, Col. 6, ll. 3–12: Describes multiple embodiments of taper geometry including 'linear, parabolic, or multi-segment taper profiles'
Prosecution History: 'Adiabatically coupled' limitation added during prosecution to distinguish prior art (U.S. Patent No. 9,456,012, Tanaka et al.) — but the distinction was based on the prior art's lack of adiabatic performance, not on geometric continuity
Applicant's remarks during prosecution: 'The present invention achieves adiabatic coupling to ensure low-loss mode transition, unlike Tanaka which does not disclose adiabatic performance'
[slide 11]
'567 Patent — Prosecution History Timeline
[TIMELINE GRAPHIC]
Mar. 14, 2017 — Application filed (original claims did not include 'adiabatically coupled' limitation)
First Office Action — Rejection under § 102(a)(1) based on Tanaka (U.S. 9,456,012)
Applicant's Response — Amended Claim 1 to add 'adiabatically coupled'; argued Tanaka does not disclose adiabatic performance
Second Office Action — Rejection maintained on other grounds
Applicant's Response — Further clarification; claims allowed
Mar. 19, 2019 — '567 Patent issued
Lumos also cites Chen & Liu, 'Segmented Taper Coupler Design for Low-Loss Fiber-to-Chip Coupling,' J. Photonic Integration (2016) under § 103 — but this reference actually supports OWS's construction by confirming that segmented tapers can achieve adiabatic coupling
[slide 12]
'567 Patent — Application to Accused Products
[DIAGRAM] LumosBridge™ 800G optical engine — waveguide coupler architecture
Lumos uses a segmented (non-continuous) taper with discrete coupling sections to couple light from fiber to the silicon photonic integrated circuit
Under OWS's construction ('coupled such that optical mode transitions occur without significant power loss'): Lumos's segmented design achieves adiabatic coupling — infringement established
Under Lumos's construction ('gradual, continuous taper…'): Lumos's segmented design would be excluded because it is not 'continuous' — but this construction improperly reads geometric limitations into the functional term 'adiabatic'
LumosEdge™ 400ZR+ uses a similar segmented coupler design
[slide 13]
Germanium-on-Silicon Photodetectors — Graded vs. Step-Graded Buffer Layers
[DIAGRAM] Cross-section of a germanium-on-silicon photodetector showing the buffer layer between the Si substrate and the Ge absorber
Continuously graded buffer: Germanium concentration varies smoothly (e.g., linearly or parabolically) from pure Si to pure Ge across the buffer thickness
Step-graded buffer: Germanium concentration changes in discrete steps (e.g., 0.25 → 0.50 → 0.75 → 1.0 Ge atomic fraction)
Both approaches serve the same purpose: managing lattice mismatch to reduce threading dislocation density
A POSITA understands 'graded' to encompass both continuously graded and step-graded profiles — these are two well-known implementations of the same concept
[slide 14]
'234 Patent — Claim 1 (Representative Independent Claim)
Claim 1: 'A photodetector structure comprising:'
'a silicon substrate;'
'[HIGHLIGHTED] a graded buffer layer having a continuously varying germanium concentration disposed on the silicon substrate;'
'a germanium absorber layer disposed on the graded buffer layer…'
[Remaining dependent asserted claims: 3, 5, 8, 11]
[ANNOTATED PATENT FIGURE] Fig. 5 of the '234 Patent showing the photodetector cross-section with labeled layers
[slide 15]
'234 Patent — Disputed Term: 'Graded Buffer Layer Having a Continuously Varying Germanium Concentration' — Side-by-Side Constructions
OWS's Proposed Construction: 'a buffer layer in which the germanium concentration changes across the layer thickness'
Lumos's Proposed Construction: 'a buffer layer in which the germanium atomic fraction increases monotonically and without step changes from the silicon substrate interface to the absorber layer'
Key Difference: Lumos adds two limitations not in the claim language: (1) 'monotonically' — requires only increasing concentration, excluding any non-monotonic profiles; (2) 'without step changes' — explicitly excludes step-graded designs
The specification describes step-graded buffers as an embodiment — Lumos's construction would exclude a disclosed embodiment, which is disfavored under claim construction principles
[slide 16]
'234 Patent — Specification Evidence and Embodiment Analysis
[ANNOTATED SPECIFICATION EXCERPT] Col. 5, ll. 20–35: 'The graded buffer layer may be formed with a continuously varying germanium concentration, such as a linear or parabolic profile, or alternatively with a step-graded profile comprising discrete compositional steps…'
Both grading methods are described as achieving the same inventive purpose: reducing threading dislocations and enhancing photodetector responsivity
No language in the specification limits the claims to a smoothly continuous profile
Claim differentiation: Dependent claims add further specificity to the buffer structure — the independent claim should not be read as narrowly as Lumos proposes
[slide 17]
'234 Patent — Prior Art Context
Lumos cites EP 3,234,567 A1 (Nordlicht Photonische GmbH, published Aug. 2, 2017) against the '234 Patent under § 102(a)(2)
The Nordlicht application discloses a step-graded buffer — if 'continuously varying' excludes step-graded designs, the Nordlicht reference would not be anticipatory prior art
Lumos's narrow construction is motivated by invalidity strategy: construe claims narrowly to avoid prior art, then argue non-infringement
OWS submits that the claims should be construed based on intrinsic evidence, not reverse-engineered to avoid prior art
The '234 Patent was allowed on first office action after examiner interview — no narrowing amendments were made
[slide 18]
'234 Patent — Application to Accused Products
[DIAGRAM] Lumos's germanium photodetector cross-section (from discovery materials, designated AEO)
Lumos uses a step-graded SiGe buffer with four discrete composition steps: Ge atomic fractions of 0.25, 0.50, 0.75, and 1.0
Under OWS's construction ('germanium concentration changes across the layer thickness'): Lumos's step-graded buffer clearly has a varying Ge concentration — infringement established
Under Lumos's construction ('increases monotonically and without step changes'): Lumos's discrete steps would be excluded — but this construction is inconsistent with the specification
Both LumosBridge 800G and LumosEdge 400ZR+ use this same photodetector architecture
[slide 19]
Monolithic vs. Heterogeneous Integration in Silicon Photonics
[DIAGRAM] Monolithic integration: All components fabricated on a single silicon substrate using the same front-end and back-end semiconductor process flow
[DIAGRAM] Heterogeneous integration: Separately fabricated components (e.g., III-V gain elements) bonded, flip-chipped, or micro-transfer-printed onto the silicon substrate
Industry trend: Pure monolithic integration is challenging for certain functions (e.g., light sources); heterogeneous integration techniques like micro-transfer printing have gained widespread adoption
A POSITA understands 'monolithically formed' in the context of the WDM element specifically — not as requiring the entire transceiver to avoid all heterogeneous techniques
[slide 20]
'678 Patent — Claim 1 (Representative Independent Claim)
Claim 1: 'A multi-channel optical transceiver comprising:'
'a plurality of optical channels…'
'[HIGHLIGHTED] an integrated wavelength-division multiplexing element monolithically formed on a single silicon die…'
[Remaining dependent asserted claims: 2, 6, 9, 14]
[ANNOTATED PATENT FIGURE] Fig. 7 of the '678 Patent showing the WDM element integrated on the silicon die
Named Inventors: Dr. Priya Ramanathan, Dr. Amara Osei, Liwei Zhang
[slide 21]
'678 Patent — Disputed Term: 'Monolithically Formed on a Single Silicon Die' — Side-by-Side Constructions
OWS's Proposed Construction: 'a WDM component fabricated as part of the same semiconductor fabrication process on a single die'
Lumos's Proposed Construction: 'a WDM component formed during front-end-of-line processing within the same silicon substrate, excluding hybrid integration, flip-chip bonding, or any heterogeneous integration technique'
Key Difference: Lumos's construction sweeps far beyond the WDM element itself — it would exclude any die that contains any heterogeneously bonded component, even if the WDM element is itself monolithically formed
Lumos's construction reads in a blanket exclusion of all heterogeneous techniques anywhere on the die — language not found in the claims
[slide 22]
'678 Patent — Prosecution History and Estoppel Analysis
[TIMELINE GRAPHIC]
Jun. 22, 2018 — Application filed (original claims broader, did not include 'monolithically formed')
Three Office Actions — Rejections based on hybrid integration prior art references
Applicant's Amendment — Added 'monolithically formed on a single silicon die' to Claim 1
Applicant's Remarks: 'The present invention is distinguished from heterogeneous integration approaches' — in context, referring to WDM elements that were themselves heterogeneously integrated
Jun. 29, 2021 — '678 Patent issued
Scope of estoppel under Festo: limited to the WDM element's formation process, not a blanket exclusion of all heterogeneous techniques on the die
[slide 23]
'678 Patent — Application to Accused Products
[DIAGRAM] Lumos LumosBridge™ 800G platform architecture
Lumos's WDM element (arrayed waveguide grating) IS monolithically formed in the silicon waveguide layer — fabricated entirely within the standard CMOS-compatible process flow
Lumos's III-V gain elements (laser sources) are separately fabricated and micro-transfer-printed onto the silicon PIC — this is a heterogeneous integration step for the LASER, not the WDM element
Under OWS's construction: The WDM element is monolithically formed on a single silicon die — infringement established regardless of how other components are integrated
Under Lumos's construction: The presence of ANY heterogeneously bonded component on the die would negate 'monolithically formed' — even though the WDM element itself is monolithic
[slide 24]
Modulator Driver Co-Integration — Background
[DIAGRAM] Silicon photonic Mach-Zehnder modulator (MZM) with driver circuit
Co-integration: driver circuit fabricated on the same substrate as the modulator, using shared process layers and doping profiles
Alternative approach: separate driver die (typically CMOS) connected to the photonic modulator die via flip-chip bonding (copper pillar micro-bumps), wire bonds, or interposers
Co-integration offers advantages in signal integrity, bandwidth, and reduced parasitics
Industry practice: both co-integrated and separately packaged driver approaches are widely used
[slide 25]
'890 Patent — Claim 1 (Representative Independent Claim)
Claim 1: 'A driver circuit architecture for a silicon photonic Mach-Zehnder modulator, comprising:'
'[HIGHLIGHTED] a pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate…'
[Remaining dependent asserted claims: 5, 8, 13]
[ANNOTATED PATENT FIGURE] Fig. 9 of the '890 Patent showing the driver and modulator on a common substrate
Named Inventors: Dr. Kevin Fong, Rajesh Iyer
[slide 26]
'890 Patent — Disputed Term: 'Co-Integrated' — Side-by-Side Constructions
OWS's Proposed Construction: 'an equalization circuit located on the same substrate as the modulator'
Lumos's Proposed Construction: 'an equalization circuit fabricated in the same semiconductor process as the modulator, sharing the same doping profiles and process layers, and electrically connected without bond wires, interposers, or package-level routing'
Key Difference: Lumos adds extensive process-level limitations not required by the claim language — same doping profiles, same process layers, no bond wires, no interposers, no package-level routing
OWS's construction gives 'co-integrated' its plain meaning: integrated together on a common substrate
Lumos's construction conflates 'co-integrated' with 'monolithically co-fabricated in a single process' — a far narrower concept
[slide 27]
'890 Patent — Prosecution History
[TIMELINE GRAPHIC]
Nov. 15, 2018 — Application filed
Two Office Actions — Rejections based on prior art showing separate driver and modulator chips
Applicant's Amendment — Added 'electrically co-integrated with the modulator on a common substrate'
Applicant's Remarks: Distinguished prior art where 'the driver circuit is fabricated on a separate die and connected to the modulator through wire bonding or flip-chip interconnects'
Apr. 26, 2022 — '890 Patent issued
Prior art cited by Lumos: Iyer & Patel, 'Co-Design of Modulator Drivers and Silicon Photonic Mach-Zehnder Structures,' IEEE Trans. Circuits & Systems (2018) — under § 103
[slide 28]
'890 Patent — Application to Accused Products
[DIAGRAM] Lumos's modulator driver architecture — LumosBridge 800G
Lumos uses a separate CMOS driver die flip-chip bonded to the silicon photonic modulator die via copper pillar micro-bumps
The pre-emphasis equalization functionality is implemented on the CMOS driver die