1014-00003 · Optiwave Semiconductor Corp · Claim Construction

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UNITED STATES DISTRICT COURT NORTHERN DISTRICT OF CALIFORNIA SAN JOSE DIVISION

OPTIWAVE SEMICONDUCTOR CORP.,

Plaintiff,

LUMOS PHOTONICS, INC.,

Defendant.

Case No. 5:22-cv-03417-EJD

Hon. Edward J. Torvelis

PLAINTIFF OPTIWAVE SEMICONDUCTOR CORP.'S PRELIMINARY CLAIM CONSTRUCTION CONTENTIONS PURSUANT TO PATENT LOCAL RULE 4-1

Date: September 12, 2022

I. INTRODUCTION

Plaintiff Optiwave Semiconductor Corp. ("OWS") hereby respectfully submits its Preliminary Claim Construction Contentions pursuant to Patent Local Rule 4-1 of the Northern District of California. OWS files these contentions in accordance with the Court's Case Management Order entered on June 15, 2022 (Dkt. No. 42), and the parties' stipulated claim construction schedule filed on July 28, 2022 (Dkt. No. 58).

In this action, OWS asserts four United States Patents against Defendant Lumos Photonics, Inc. ("Lumos"), each of which relates to innovations in silicon photonics integrated circuit design and fabrication. The patents-in-suit are:

(a) U.S. Patent No. 10,234,567 ("the '567 Patent"), entitled "Integrated Waveguide Coupler with Tapered Mode Converter for Silicon Photonics Platforms," which issued on March 19, 2019;

(b) U.S. Patent No. 10,891,234 ("the '234 Patent"), entitled "Germanium-on-Silicon Photodetector with Graded Buffer Layer for Enhanced Responsivity," which issued on January 14, 2021;

(c) U.S. Patent No. 11,045,678 ("the '678 Patent"), entitled "Multi-Channel Optical Transceiver with Integrated Wavelength-Division Multiplexing on Silicon," which issued on June 29, 2021; and

(d) U.S. Patent No. 11,312,890 ("the '890 Patent"), entitled "Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators," which issued on April 26, 2022.

OWS is the owner by assignment of each of the patents-in-suit. Each patent was duly and lawfully issued by the United States Patent and Trademark Office after full and fair prosecution.

The accused products in this action are Lumos's LumosBridge™ 800G Optical Engine and LumosEdge™ 400ZR+ Pluggable Transceiver, as set forth in OWS's Disclosure of Asserted Claims and Infringement Contentions served pursuant to Patent Local Rule 3-1 on August 1, 2022.

OWS identifies below each claim term for which it contends construction is necessary and provides its proposed construction for each such term, together with specific citations to the intrinsic evidence supporting each proposed construction. For certain terms, OWS submits that the term carries its plain and ordinary meaning as understood by a person of ordinary skill in the art and does not require construction beyond what the claim language itself conveys. For other terms, OWS proposes constructions that faithfully reflect the meaning conveyed by the intrinsic record—including the claim language, specification, and prosecution history of each patent.

OWS identifies a total of eleven (11) claim terms across the four patents-in-suit, of which five (5) require affirmative construction and six (6) should be given their plain and ordinary meaning. These terms, the claims in which they appear, OWS's proposed constructions, and supporting intrinsic evidence are set forth in detail in Sections III and IV below, and are summarized in the Claim Construction Charts attached hereto as Exhibits A through D.

II. LEGAL STANDARD FOR CLAIM CONSTRUCTION

Claim construction is a matter of law to be determined by the Court. Markman v. Westview Instruments, Inc., 517 U.S. 370, 372 (1996). The Federal Circuit's en banc decision in Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005), provides the governing framework for claim construction.

Under Phillips, claim terms are to be construed as they would be understood by a person of ordinary skill in the art ("POSITA") at the time of the invention, in light of the specification and prosecution history. Phillips, 415 F.3d at 1313. The words of a claim are "generally given their ordinary and customary meaning," which is "the meaning that the term would have to a person of ordinary skill in the art in question at the time of the invention." Id. at 1312–13. This inquiry does not focus on the meaning of a term in the abstract, but rather on the meaning of the term in the context of the patent, including the particular claim in which the term appears. Id. at 1314.

For purposes of the patents-in-suit, OWS submits that a person of ordinary skill in the art at the relevant time (2017–2018) would be a person holding at least a master's degree in electrical engineering, applied physics, or a related field, with at least three years of professional experience in the design, fabrication, or characterization of silicon photonics integrated circuits, including waveguide structures, photodetectors, optical transceivers, and modulator driver architectures. Alternatively, a person of ordinary skill would hold at least a bachelor's degree in electrical engineering, applied physics, or a related field, with at least five years of such professional experience. Additional education or experience in one area may compensate for a lesser degree of expertise in another.

The intrinsic record—consisting of the claims themselves, the specification (including the written description and any drawings), and the prosecution history—is the primary source for determining the meaning of claim terms. Phillips, 415 F.3d at 1314–17. Of these, the specification is "the single best guide to the meaning of a disputed term." Id. at 1315 (quoting Ridgeway & Co. v. Conceptronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996)). The specification may act as a dictionary for claim terms, and the claims themselves provide "substantial guidance as to the meaning of particular claim terms." Id. at 1314. The prosecution history, which provides a complete record of all proceedings before the Patent and Trademark Office, may also inform the meaning of claim terms and may include any disclaimer or disavowal of claim scope. Id. at 1317.

Claim terms are given their plain and ordinary meaning as understood by a POSITA unless the patentee (1) acted as its own lexicographer by clearly setting forth a special definition of a term in the specification, or (2) clearly disclaimed or disavowed the full scope of the claim term either in the specification or during prosecution. Thorner v. Sony Comput. Entm't Am. LLC, 669 F.3d 1362, 1365 (Fed. Cir. 2012). Any such lexicographic definition must be set forth with "reasonable clarity, deliberateness, and precision." Ashford Corporation v. Ashgrove Partners LLC, 158 F.3d 1243, 1249 (Fed. Cir. 1998).

In construing claims, the Court should avoid importing limitations from the specification into the claims. Phillips, 415 F.3d at 1323. While the specification may describe a preferred embodiment of the invention, "the claims of the patent, not the patent's specification, define the scope of the patent right." Id. (citing Innova/Pure Water, Inc. v. Safari Water Filtration Sys., Inc., 381 F.3d 1111, 1115 (Fed. Cir. 2004)). The Federal Circuit has consistently cautioned that "it is improper to read limitations from a preferred embodiment described in the specification—even if it is the only embodiment—into the claims absent a clear indication in the intrinsic record that the patentee intended the claims to be so limited." Ashford Enterprises v. Dunmore Corporation, 358 F.3d 898, 906 (Fed. Cir. 2004).

Additionally, the doctrine of claim differentiation provides a presumption that each claim in a patent has a different scope. Phillips, 415 F.3d at 1315. Where a dependent claim adds a limitation to the independent claim from which it depends, this creates a presumption that the independent claim does not require that limitation. Id.

Extrinsic evidence—including expert testimony, inventor testimony, technical dictionaries, and treatises—may also be considered, but cannot be used to override the meaning conveyed by the intrinsic record. Phillips, 415 F.3d at 1318–19. Such evidence may be useful to "provide background on the technology at issue, to explain how an invention works, to ensure that the court's understanding of the technical aspects of the patent is consistent with that of a person of skill in the art, or to establish that a particular term in the patent or the prior art has a particular meaning in the pertinent field." Id. at 1318.

III. IDENTIFICATION OF ASSERTED CLAIMS

A. U.S. Patent No. 10,234,567 ("the '567 Patent")

The '567 Patent, entitled "Integrated Waveguide Coupler with Tapered Mode Converter for Silicon Photonics Platforms," was filed on March 14, 2017, and issued on March 19, 2019. The named inventors are Dr. Kevin Fong, Dr. Priya Ramanathan, and Hideo Tanaka. The '567 Patent is directed to integrated optical coupling structures for silicon photonics platforms, and more specifically to tapered mode converters that facilitate efficient optical mode transfer between silicon and silicon nitride waveguide layers.

OWS asserts Claims 1, 4, 7, 12, and 15 of the '567 Patent. Claim 1 is an independent claim. Claims 4, 7, 12, and 15 are dependent claims that depend directly or indirectly from Claim 1 and add additional limitations specifying, inter alia, particular taper geometries, coupling efficiency parameters, and integration configurations.

B. U.S. Patent No. 10,891,234 ("the '234 Patent")

The '234 Patent, entitled "Germanium-on-Silicon Photodetector with Graded Buffer Layer for Enhanced Responsivity," was filed on September 8, 2017, and issued on January 14, 2021. The named inventors are Dr. Kevin Fong and Dr. Amara Osei. The '234 Patent is directed to germanium-on-silicon photodetector structures incorporating a graded buffer layer to reduce threading dislocation density and thereby enhance photodetector responsivity at near-infrared wavelengths commonly used in optical communications.

OWS asserts Claims 1, 3, 5, 8, and 11 of the '234 Patent. Claim 1 is an independent claim. Claims 3, 5, 8, and 11 are dependent claims that depend directly or indirectly from Claim 1 and add additional limitations specifying, inter alia, particular concentration profiles, buffer layer thicknesses, and detector geometry configurations.

C. U.S. Patent No. 11,045,678 ("the '678 Patent")

The '678 Patent, entitled "Multi-Channel Optical Transceiver with Integrated Wavelength-Division Multiplexing on Silicon," was filed on June 22, 2018, and issued on June 29, 2021. The named inventors are Dr. Priya Ramanathan, Dr. Amara Osei, and Liwei Zhang. The '678 Patent is directed to multi-channel optical transceiver architectures in which wavelength-division multiplexing functionality is monolithically integrated on a single silicon die, thereby achieving cost, yield, and alignment advantages over conventional hybrid integration approaches.

OWS asserts Claims 1, 2, 6, 9, and 14 of the '678 Patent. Claim 1 is an independent claim. Claims 2, 6, 9, and 14 are dependent claims that depend directly or indirectly from Claim 1 and add additional limitations specifying, inter alia, particular WDM element types, integration levels for other on-die components, channel counts, and wavelength spacing configurations.

D. U.S. Patent No. 11,312,890 ("the '890 Patent")

The '890 Patent, entitled "Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators," was filed on November 15, 2018, and issued on April 26, 2022. The named inventors are Dr. Kevin Fong and Rajesh Iyer. The '890 Patent is directed to driver circuit architectures in which a pre-emphasis equalization stage is co-integrated with a Mach-Zehnder modulator on a common substrate, thereby reducing parasitic interconnect effects and improving signal integrity at high data rates.

OWS asserts Claims 1, 5, 8, and 13 of the '890 Patent. Claim 1 is an independent claim. Claims 5, 8, and 13 are dependent claims that depend directly or indirectly from Claim 1 and add additional limitations specifying, inter alia, particular integration methodologies, equalization circuit configurations, and modulator operating parameters.

IV. CLAIM TERMS REQUIRING CONSTRUCTION AND OWS'S PROPOSED CONSTRUCTIONS

OWS identifies below each claim term for which it contends construction is necessary or for which a dispute may exist, together with its proposed construction and citations to supporting intrinsic evidence. For ease of reference, OWS addresses the terms patent-by-patent.

A. Terms from U.S. Patent No. 10,234,567 ("the '567 Patent")

1. "adiabatically coupled" (Claim 1)

Claim Context. Claim 1 of the '567 Patent recites, in relevant part:

An integrated optical coupler comprising a tapered silicon waveguide having a tip width of less than 200 nanometers adiabatically coupled to a silicon nitride waveguide layer…

OWS's Proposed Construction: "coupled such that optical mode transitions occur without significant power loss."

Intrinsic Evidence in Support of OWS's Proposed Construction.

Specification. The '567 Patent specification provides extensive guidance as to the meaning of "adiabatically coupled" as understood by a person of ordinary skill in the art. At column 4, lines 15–32, the specification describes adiabatic coupling as a process in which "optical energy transfers between waveguides with minimal loss, such that the fundamental mode of the input waveguide evolves smoothly into the fundamental mode of the output waveguide without excitation of higher-order or radiative modes." This passage confirms that the hallmark of adiabatic coupling is the avoidance of significant optical power loss during the mode transition—not any particular physical structure or taper geometry.

The specification further discloses multiple embodiments of adiabatic coupling, demonstrating that the term encompasses range structural implementations. At column 5, lines 8–25, the specification states: "Adiabatic coupling may be achieved through various taper geometries including gradual continuous tapers, segmented tapers, and multi-stage transitions, provided the mode transition is sufficiently slow to avoid excitation of radiative modes." Figures 3A, 3B, and 3C illustrate, respectively, a continuous linear taper, a nonlinear parabolic taper, and a multi-segment taper with discrete sections of differing widths, all described as embodiments of "adiabatic coupling." See also '567 Patent, col. 7, ll. 1–18 (describing simulated coupling efficiencies for each of these taper geometries and confirming that each achieves adiabatic mode transition with measured losses below 0.5 dB).

OWS's proposed construction faithfully captures the functional essence of the term "adiabatically coupled" as used throughout the specification—namely, that optical mode transitions occur without significant power loss—without improperly limiting the claim to any single disclosed embodiment or taper geometry. The construction is consistent with the specification's express statement that multiple structural approaches can achieve adiabatic coupling, and it avoids the error of reading a preferred embodiment limitation into the claim.

Prosecution History. The prosecution history confirms OWS's proposed construction. During prosecution of the '567 Patent, the term "adiabatically coupled" was added to Claim 1 by amendment filed on November 8, 2018, in response to a non-final Office Action rejecting Claim 1 under 35 U.S.C. § 102 as anticipated by U.S. Patent No. 9,456,012 (Tanaka). In the accompanying remarks, the applicant distinguished the Tanaka reference on the ground that Tanaka's coupler structure employed an abrupt mode transition that did not achieve adiabatic mode transfer—i.e., that Tanaka's coupler did "not prevent significant power loss during mode transition" due to the abrupt nature of the coupling region. The remarks stated:

"The present invention is distinguished from Tanaka because the claimed coupler achieves adiabatic coupling between the tapered silicon waveguide and the silicon nitride waveguide layer. In Tanaka, the mode transition occurs abruptly across a short coupling length, resulting in significant excitation of higher-order and radiative modes. By contrast, the present claims require that the coupling be adiabatic—i.e., that the optical mode transitions occur without significant power loss."

These remarks confirm that the amendment was directed to the functional result of adiabatic coupling—the avoidance of significant power loss during mode transition—and not to any particular structural taper configuration. The applicant did not state, either in the amendment or the remarks, that "adiabatically coupled" requires a continuous taper, a particular taper length, or any other specific structural feature. Accordingly, OWS's amendment narrowed the claim by adding the "adiabatically coupled" limitation, but did not disclaim any particular structural approach to achieving adiabatic coupling. The scope of any prosecution history estoppel under Festo Corp. v. Fenmore & Co., 535 U.S. 722 (2002), is limited to the specific prior art surrendered (i.e., non-adiabatic couplers such as Tanaka's abrupt coupler), not to particular structural implementations of adiabatic coupling.

Claim Differentiation. The doctrine of claim differentiation further supports OWS's proposed construction and confirms that "adiabatically coupled" in independent Claim 1 is not limited to any particular taper geometry. Dependent Claim 4 of the '567 Patent adds the limitation that the tapered silicon waveguide has "a continuous taper profile." Dependent Claim 7 adds the limitation that the tapered silicon waveguide has "a multi-segment taper comprising at least three discrete taper sections of differing widths." If independent Claim 1's use of "adiabatically coupled" were construed to require a continuous taper, then dependent Claim 7—which specifically claims a multi-segment (non-continuous) taper—would be either superfluous or self-contradictory. Under the doctrine of claim differentiation, such a construction must be rejected. See Phillips, 415 F.3d at 1315; Curtiss-Wright Flow Control Corp. v. Velan, Inc., 438 F.3d 1374, 1380 (Fed. Cir. 2006). OWS's proposed construction—"coupled such that optical mode transitions occur without significant power loss"—avoids this result and gives independent meaning to both dependent Claims 4 and 7.

2. "tapered silicon waveguide having a tip width of less than 200 nanometers" (Claim 1)

Claim Context. Claim 1 of the '567 Patent recites, in relevant part:

An integrated optical coupler comprising a tapered silicon waveguide having a tip width of less than 200 nanometers adiabatically coupled to a silicon nitride waveguide layer…

OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "a silicon waveguide that narrows along its length to a terminal tip having a width dimension of less than 200 nm."

Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '567 Patent at column 3, lines 40–55, describes the tip width as a critical dimension for achieving effective mode matching between the silicon waveguide and the underlying or adjacent silicon nitride waveguide layer. The specification explains that as the silicon waveguide narrows to sub-200-nanometer tip widths, the optical mode is progressively deconfined from the high-index silicon core and transitions to the lower-index silicon nitride waveguide. Table 1 at column 6 of the specification provides experimental data for tip widths ranging from 80 nm to 195 nm, confirming that all tip widths within this range are below the claimed 200 nm upper bound.

The term "tip width" has a well-understood meaning in the field of silicon photonics and waveguide design. It refers to the narrowest cross-sectional width dimension of a waveguide taper at its terminal end—i.e., the point at which the taper terminates. The specification uses this term in its ordinary sense, and OWS submits that no construction beyond the plain and ordinary meaning is required. The numerical limitation "less than 200 nanometers" is clear on its face and requires no further interpretation.

3. "silicon nitride waveguide layer" (Claim 1)

Claim Context. Claim 1 of the '567 Patent recites a tapered silicon waveguide "adiabatically coupled to a silicon nitride waveguide layer."

OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "a waveguide formed of silicon nitride (SiN or Si₃N₄) material."

Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '567 Patent at column 4, lines 1–14, describes silicon nitride waveguide layers of varying stoichiometries, including both stoichiometric silicon nitride (Si₃N₄) and silicon-rich silicon nitride (SiNₓ where x < 4/3), deposited by low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD) processes. The specification does not limit the term "silicon nitride waveguide layer" to a particular stoichiometry, deposition method, or layer thickness. The term is used throughout the specification in its ordinary and customary sense as understood by those skilled in integrated photonics, and OWS submits that no construction beyond the plain and ordinary meaning is required.

B. Terms from U.S. Patent No. 10,891,234 ("the '234 Patent")

4. "graded buffer layer having a continuously varying germanium concentration" (Claim 1)

Claim Context. Claim 1 of the '234 Patent recites, in relevant part:

A germanium-on-silicon photodetector structure comprising… a graded buffer layer having a continuously varying germanium concentration disposed between a silicon substrate and a germanium absorber layer…

OWS's Proposed Construction: "a buffer layer in which the germanium concentration changes across the layer thickness."

Intrinsic Evidence in Support of OWS's Proposed Construction.

Specification. The '234 Patent specification provides detailed guidance as to the meaning and scope of the term "graded buffer layer having a continuously varying germanium concentration." At column 3, lines 20–45, the specification describes the graded buffer layer as a structural feature that provides "a gradual transition in lattice constant from the silicon substrate to the germanium absorber layer, thereby reducing the density of threading dislocations that would otherwise propagate into the active germanium absorber region." The specification explains that a high threading dislocation density in the germanium absorber layer degrades photodetector responsivity and increases dark current, and that the graded buffer layer addresses these problems by accommodating the 4.2% lattice mismatch between silicon and germanium through a progressive change in composition.

Critically, the specification describes two distinct types of graded buffer layer implementations as embodiments of the claimed invention. At column 5, lines 30–50, the specification describes a first embodiment in which the germanium concentration increases linearly from a low value (e.g., Si₀.₉Ge₀.₁) adjacent to the silicon substrate to a high value (e.g., Si₀.₁Ge₀.₉ or pure Ge) adjacent to the germanium absorber layer. This embodiment is illustrated in Figure 4A, which shows a buffer layer with a smooth, linearly increasing germanium concentration profile (continuous grading). At column 6, lines 5–22, the specification describes a second embodiment in which the germanium concentration increases in a stepwise fashion through multiple discrete composition plateaus—for example, four steps of approximately 25 at.% germanium each. This embodiment is illustrated in Figure 4B, which shows a buffer layer with a stepwise increasing germanium concentration profile with multiple discrete composition steps. The specification expressly describes the Figure 4B embodiment as an "alternative embodiment of the graded buffer layer" in which the "germanium concentration varies continuously in the sense that it progresses through a series of increasing concentration levels across the buffer layer thickness."

The specification uses the phrase "continuously varying" to refer to a germanium concentration that changes—i.e., that varies in a continuous progression—across the buffer layer thickness, as contrasted with a uniform (constant) composition layer in which the germanium concentration does not change at all. This usage encompasses both smooth (analog) gradients and step-graded (digital) profiles where the concentration progresses through a series of increasing steps. The specification states at column 3, lines 28–33: "The germanium concentration in the buffer layer continuously varies from a low concentration adjacent to the silicon substrate to a high concentration adjacent to the absorber." Both Figures 4A and 4B are described as showing embodiments of this continuously varying concentration.

OWS's proposed construction—"a buffer layer in which the germanium concentration changes across the layer thickness"—faithfully captures the specification's use of "continuously varying" to mean that the germanium concentration changes (rather than remaining constant) across the buffer layer. This construction does not improperly limit the claim to the smooth gradient embodiment of Figure 4A, nor does it exclude the step-graded embodiment of Figure 4B, both of which are expressly disclosed as embodiments of the claimed graded buffer layer.

Prosecution History. The prosecution history of the '234 Patent contains no basis for narrowing the scope of this term. The '234 Patent was allowed on the first Office Action following an examiner interview conducted on September 10, 2020. During the interview, the examiner and applicant discussed the prior art of record, and the examiner agreed that the claims as originally filed were allowable. The applicant did not amend the claims to narrow "continuously varying" and made no written statements during prosecution distinguishing step-graded from continuously graded buffer layers. Accordingly, no prosecution history estoppel applies, and there is no basis for construing this term more narrowly than the specification supports.

5. "germanium absorber layer" (Claim 1)

Claim Context. Claim 1 of the '234 Patent recites a graded buffer layer "disposed between a silicon substrate and a germanium absorber layer."

OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "a layer composed primarily of germanium that absorbs incident photons to generate charge carriers."

Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '234 Patent at column 3, lines 50–65, describes the germanium absorber layer and its function in photodetection. The specification explains that the germanium absorber layer is the active region of the photodetector in which incident photons at near-infrared wavelengths (specifically, 1310 nm and 1550 nm, the standard wavelengths for optical communications) are absorbed to generate electron-hole pairs that are collected as photocurrent. The term "germanium absorber layer" is used throughout the specification in its ordinary and customary sense as understood by those skilled in the art of semiconductor photodetectors, and OWS submits that no construction beyond the plain and ordinary meaning is required.

6. "enhanced responsivity" (Title; referenced in dependent claims)

OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary.

Intrinsic Evidence. The term "enhanced responsivity" appears in the title of the '234 Patent and is referenced in the context of certain dependent claims describing the advantages of the graded buffer layer structure. The specification at column 2, lines 10–25, discusses the well-known problem of high threading dislocation density in germanium-on-silicon photodetectors, which degrades responsivity by creating non-radiative recombination centers that reduce photogenerated carrier collection efficiency. The specification describes the graded buffer layer as providing the solution to this problem by reducing dislocation density, thereby "enhancing" the responsivity of the resulting photodetector as compared to devices fabricated without such a buffer layer. The term "enhanced responsivity" is used in its ordinary descriptive sense—indicating improved responsivity relative to a baseline—and does not define a specific numerical threshold or figure of merit. OWS submits that no construction beyond the plain and ordinary meaning is necessary.

C. Terms from U.S. Patent No. 11,045,678 ("the '678 Patent")

7. "integrated wavelength-division multiplexing element monolithically formed on a single silicon die" (Claim 1)

Claim Context. Claim 1 of the '678 Patent recites, in relevant part:

A multi-channel optical transceiver comprising… an integrated wavelength-division multiplexing element monolithically formed on a single silicon die…

OWS's Proposed Construction: "a WDM component fabricated as part of the same semiconductor fabrication process on a single die."

Intrinsic Evidence in Support of OWS's Proposed Construction.

Specification. The '678 Patent specification provides detailed guidance as to the meaning of "integrated wavelength-division multiplexing element monolithically formed on a single silicon die." At column 4, lines 5–30, the specification describes monolithic integration as a fabrication approach in which the WDM element—which may take the form of an arrayed waveguide grating (AWG), an echelle grating, a cascaded Mach-Zehnder interferometer filter, or other wavelength-selective structures—is "formed on the same silicon die as the other transceiver components using standard semiconductor fabrication processes." The specification explains that this monolithic approach achieves significant advantages over hybrid integration, including lower cost, higher fabrication yield, and inherently superior alignment precision because the WDM element and other photonic components are defined by the same lithographic process. See '678 Patent, col. 4, ll. 31–50 (comparing monolithic and hybrid approaches and discussing the alignment, cost, and yield benefits of monolithic integration of the WDM element).

The specification further describes specific embodiments in which monolithic integration of the WDM element is accomplished using CMOS-compatible front-end-of-line (FEOL) and back-end-of-line (BEOL) processing on a silicon-on-insulator (SOI) wafer. See '678 Patent, col. 5, ll. 1–20 (describing patterning of waveguides, modulators, and the WDM element in the silicon device layer of an SOI wafer using standard 193 nm deep-UV lithography). The specification also describes embodiments in which certain non-WDM components—specifically, gain elements such as III-V semiconductor laser sources—may be added to the silicon die using wafer-bonding or transfer-printing techniques, while the WDM element itself remains monolithically formed on the silicon die using the native silicon fabrication process. See '678 Patent, col. 7, ll. 10–30 (describing an embodiment in which InP-based laser gain sections are bonded to the SOI wafer to provide on-chip gain, while the AWG multiplexer/demultiplexer is monolithically formed in the silicon device layer).

OWS's proposed construction—"a WDM component fabricated as part of the same semiconductor fabrication process on a single die"—accurately captures the specification's description of monolithic formation. The construction requires that the WDM element itself be fabricated using the semiconductor fabrication process that forms the die, rather than being separately fabricated and subsequently attached (as in hybrid integration). This construction is consistent with the specification's use of "monolithically formed" to distinguish the claimed invention from hybrid integration approaches in which the WDM element is fabricated on a separate substrate and then assembled onto the transceiver platform.

Prosecution History. The prosecution history confirms OWS's proposed construction and establishes that "monolithically formed" was added to distinguish the WDM element from hybrid WDM components, not to impose a blanket requirement that all components on the die be monolithically integrated. During prosecution of the '678 Patent, the term "monolithically formed" was added by amendment filed on February 22, 2021, in response to a non-final Office Action rejecting Claim 1 under 35 U.S.C. § 103 as obvious over a combination of prior art references disclosing hybrid integration approaches for WDM functionality. In the accompanying remarks, the applicant stated:

"The present invention is distinguished from [the cited references'] heterogeneous integration approaches. In the claimed invention, the wavelength-division multiplexing element is monolithically formed on the single silicon die—i.e., fabricated as part of the same semiconductor fabrication process that forms the silicon photonic die—rather than being separately fabricated on a different material platform and subsequently bonded or assembled onto the transceiver substrate."

This remark was directed specifically at the WDM element and at the prior art's use of hybrid integration for the WDM component. The applicant did not disclaim all forms of heterogeneous integration for non-WDM components on the same die. Indeed, the specification's disclosure of embodiments in which III-V gain elements are added by bonding (col. 7, ll. 10–30) confirms that the amendment was not intended to require monolithic integration of every component on the die—only the WDM element.

Claim Language. The claim language itself confirms that "monolithically formed" modifies only the "wavelength-division multiplexing element," not the entire transceiver. The phrase "an integrated wavelength-division multiplexing element monolithically formed on a single silicon die" specifies the fabrication method for the WDM element. Other components of the "multi-channel optical transceiver" recited in Claim 1 are not modified by the "monolithically formed" limitation. OWS's proposed construction reflects this grammatical structure.

Claim Differentiation. The doctrine of claim differentiation provides additional support for OWS's construction. Dependent Claim 6 of the '678 Patent adds the limitation that "all active and passive optical components are monolithically integrated on the single silicon die." If independent Claim 1 already required all components to be monolithically integrated, then dependent Claim 6 would be superfluous. The existence of Claim 6 demonstrates that the scope of independent Claim 1 is broader than Claim 6—i.e., that independent Claim 1 requires only the WDM element to be monolithically formed, while other components may or may not be monolithically integrated. See Phillips, 415 F.3d at 1315.

8. "multi-channel optical transceiver" (Claim 1)

Claim Context. Claim 1 of the '678 Patent recites, in relevant part: "A multi-channel optical transceiver comprising…"

OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "an optical transceiver capable of simultaneously transmitting and/or receiving optical signals on multiple wavelength channels."

Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '678 Patent at column 2, lines 45–60, defines multi-channel transceivers and describes their use in data center interconnects and telecommunications applications. The specification explains that multi-channel transceivers utilize wavelength-division multiplexing to transmit and/or receive multiple data streams simultaneously on different optical wavelength channels over a common optical fiber. The term "multi-channel optical transceiver" is used throughout the specification in its ordinary and customary sense as understood by those skilled in the art of optical communications, and OWS submits that no construction beyond the plain and ordinary meaning is required.

9. "single silicon die" (Claim 1)

Claim Context. Claim 1 of the '678 Patent recites a WDM element "monolithically formed on a single silicon die."

OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "a single unitary piece of silicon substrate on which semiconductor devices are fabricated."

Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '678 Patent at column 4, lines 5–15, uses the term "single silicon die" in its conventional meaning as understood by those skilled in semiconductor fabrication. The term refers to a single unitary piece of silicon substrate—typically a die cut from a processed silicon wafer—on which semiconductor devices (including photonic and electronic components) are fabricated using standard semiconductor fabrication processes. The specification does not ascribe any special or unusual meaning to this term, and OWS submits that it requires no construction beyond its plain and ordinary meaning.

D. Terms from U.S. Patent No. 11,312,890 ("the '890 Patent")

10. "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate" (Claim 1)

Claim Context. Claim 1 of the '890 Patent recites, in relevant part:

A driver circuit architecture for a silicon photonic Mach-Zehnder modulator, comprising: a pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate…

OWS's Proposed Construction: "an equalization circuit located on the same substrate as the modulator."

Intrinsic Evidence in Support of OWS's Proposed Construction.

Specification. The '890 Patent specification provides extensive disclosure concerning the meaning and scope of "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate." At column 3, lines 15–40, the specification describes co-integration as "the placement of the driver equalization circuitry and the Mach-Zehnder modulator on a common substrate, enabling reduced parasitic interconnect effects, reduced signal path length, and improved signal integrity at high data rates exceeding 50 Gbaud." The specification explains that prior art approaches typically employed driver circuitry fabricated on a separate printed circuit board (PCB) or separate semiconductor die connected to the modulator via wire bonds, resulting in parasitic inductance and capacitance that degraded high-frequency signal performance. The co-integration approach of the claimed invention eliminates or substantially reduces these parasitic effects by placing the equalization circuitry on the same substrate as the modulator.

The specification describes three distinct implementations of co-integration, each of which constitutes an embodiment of the claimed invention:

(a) Monolithic co-integration (col. 5, ll. 1–20): An embodiment in which the driver equalization circuitry is fabricated in the same CMOS process layers as the Mach-Zehnder modulator on a single silicon-on-insulator (SOI) substrate. In this embodiment, both the modulator (formed in the silicon device layer) and the driver circuitry (formed using CMOS transistors in the same or adjacent process layers) share the same substrate, the same lithographic patterning, and the same back-end-of-line metallization.

(b) Flip-chip bonded co-integration (col. 6, ll. 5–25): An embodiment in which the driver circuitry is fabricated on a separate semiconductor die that is subsequently bonded to the modulator substrate via flip-chip solder bump interconnects. In this embodiment, the bonded assembly constitutes the "common substrate," and the flip-chip interconnects provide the electrical connection between the equalization stage and the modulator with significantly lower parasitic effects than wire bonds.

(c) Interposer-based co-integration (col. 7, ll. 10–30): An embodiment in which a silicon interposer serves as the common substrate for both the modulator die and the driver die. The modulator die and the driver die are each bonded to the silicon interposer, which provides high-density electrical interconnects (e.g., through-silicon vias and redistribution layers) between the equalization stage and the modulator.

The specification's express disclosure of three distinct co-integration implementations demonstrates that the term "co-integrated… on a common substrate" is not limited to any single integration methodology. The key requirement is that the equalization stage and the modulator be located on the same substrate, whether that substrate is a single monolithically fabricated die, a flip-chip bonded assembly, or an interposer-based assembly.

The specification further provides an express definition of "common substrate" at column 3, lines 35–40, which states: "As used herein, 'common substrate' refers to a substrate that physically supports and electrically connects both the modulator and the equalization stage, including a single semiconductor die, a multi-die assembly on a common interposer, or a flip-chip bonded stack." This definition confirms that the patentee used "common substrate" broadly to encompass multiple physical configurations, provided that the substrate physically supports and electrically connects both the modulator and the equalization stage.

OWS's proposed construction—"an equalization circuit located on the same substrate as the modulator"—faithfully reflects the specification's broad use of "co-integrated… on a common substrate" and does not improperly limit the claim to any one of the three disclosed co-integration implementations. The construction captures the essential requirement of the claim: that the equalization circuit and the modulator share the same substrate.

Prosecution History. The prosecution history confirms OWS's proposed construction. During prosecution of the '890 Patent, the "co-integrated" limitation was added to Claim 1 by amendment filed on December 3, 2021, in response to a non-final Office Action rejecting Claim 1 under 35 U.S.C. § 102 as anticipated by U.S. Patent Publication No. 2016/0112789 (Liu), which disclosed a driver circuit connected to a Mach-Zehnder modulator via wire bonds from a separate PCB. In the accompanying remarks, the applicant stated:

"The present invention achieves co-integration by placing the equalization stage on the same substrate as the modulator, whether through monolithic fabrication, flip-chip bonding, or interposer-based assembly. Liu's driver circuit, by contrast, resides on a separate PCB and is connected to the modulator by wire bonds, which introduce significant parasitic inductance that degrades high-frequency performance. The claims, as amended, require that the pre-emphasis equalization stage be 'electrically co-integrated with the modulator on a common substrate,' which excludes Liu's external, wire-bonded driver arrangement."

These remarks confirm two important points. First, the applicant expressly stated that "co-integration" encompasses monolithic fabrication, flip-chip bonding, and interposer-based assembly—i.e., all three implementations disclosed in the specification. The applicant did not limit "co-integrated" to any single integration methodology. Second, the amendment was directed at distinguishing a specific type of prior art configuration—a driver circuit on a separate PCB connected by wire bonds—not at limiting the claim to a particular structural embodiment of co-integration. Accordingly, any prosecution history estoppel is narrow and limited to external, wire-bonded driver arrangements of the type disclosed in Liu.

Claim Differentiation. The doctrine of claim differentiation provides additional support for OWS's broad construction. Dependent Claim 5 of the '890 Patent adds the limitation "wherein the pre-emphasis equalization stage and the modulator share the same doping profiles and semiconductor process layers." This limitation specifies monolithic co-integration—i.e., an embodiment in which the equalization stage and the modulator are fabricated in the same semiconductor process on the same die. If independent Claim 1 already required monolithic co-integration, Claim 5 would be superfluous. The existence of Claim 5 confirms that independent Claim 1 does not require the equalization stage and modulator to be fabricated in the same semiconductor process.

Similarly, dependent Claim 8 adds the limitation "wherein the equalization stage is flip-chip bonded to the modulator substrate." This limitation specifies the flip-chip bonded co-integration embodiment. The existence of Claim 8 confirms that "co-integrated… on a common substrate" in Claim 1 encompasses flip-chip bonded configurations, and further confirms that independent Claim 1 is not limited to flip-chip bonding. Under the doctrine of claim differentiation, independent Claim 1 must be broader than both Claims 5 and 8, encompassing all forms of co-integration on a common substrate. See Phillips, 415 F.3d at 1315.

11. "Mach-Zehnder modulator" (Claim 1)

Claim Context. Claim 1 of the '890 Patent recites "a driver circuit architecture for a silicon photonic Mach-Zehnder modulator."

OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "an optical modulator based on the Mach-Zehnder interferometer architecture, in which an input optical signal is split into two arms, phase-modulated, and recombined to produce amplitude modulation."

Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '890 Patent at column 2, lines 30–45, describes Mach-Zehnder modulators in the context of silicon photonic transmitters. The specification explains that a Mach-Zehnder modulator operates by splitting an input optical signal into two waveguide arms, applying a differential phase shift between the arms (typically using carrier-depletion or carrier-injection mechanisms in silicon), and recombining the signals so that the phase difference translates into amplitude modulation of the output optical signal. The term "Mach-Zehnder modulator" is universally understood in the field of silicon photonics and optical communications, and the specification uses it in its ordinary and customary sense. OWS submits that no construction beyond the plain and ordinary meaning is required.

V. EXTRINSIC EVIDENCE TO BE RELIED UPON

OWS identifies the following categories of extrinsic evidence that it may rely upon in support of its proposed claim constructions during claim construction briefing and at the Markman hearing, to the extent such evidence is relevant and does not override the intrinsic record:

Expert Testimony. OWS intends to rely upon the declaration and/or testimony of Dr. Harold Whitfield, Ph.D., Professor Emeritus of Electrical Engineering at the University of California, Santa Barbara, and principal of Whitfield Technical Consulting Group, Inc., located in Palo Alto, California. Dr. Whitfield has over thirty years of experience in the design, fabrication, and characterization of silicon photonics integrated circuits, including waveguide couplers, germanium-on-silicon photodetectors, optical transceivers, and modulator driver circuits. Dr. Whitfield is expected to testify regarding the understanding of a person of ordinary skill in the art of the disputed claim terms at the time of the relevant inventions (2017–2018), including the ordinary and customary meaning of the claim terms at issue, the technical context in which those terms are used, and the manner in which the intrinsic record would inform a POSITA's understanding of those terms.

Technical Dictionaries and Treatises. OWS may rely upon standard reference works in the fields of integrated photonics and semiconductor fabrication, including recognized textbooks on silicon photonics, waveguide theory, optical transceiver design, and photodetector design. Specific treatises and reference works to be relied upon will be identified in subsequent claim construction filings. These works may include, without limitation, treatises on silicon photonic device physics, optical interconnect architectures, and semiconductor process integration.

Technical Publications. OWS may rely upon peer-reviewed journal articles and conference papers in the field of silicon photonics integrated circuits published contemporaneously with the filing dates of the patents-in-suit (approximately 2017–2018). Such publications may be used to demonstrate the meaning of disputed claim terms in the art at the relevant time, the state of the art with respect to the technologies disclosed in the patents-in-suit, and the level of ordinary skill in the art. Specific publications to be relied upon will be identified in subsequent claim construction filings.

Inventor Testimony. OWS may rely upon deposition testimony of the named inventors of the patents-in-suit—specifically, Dr. Kevin Fong, Dr. Priya Ramanathan, Dr. Amara Osei, Hideo Tanaka, Liwei Zhang, and Rajesh Iyer—as may be taken during claim construction discovery. Such testimony may provide background on the technology at issue, the context of the inventions, and the meaning of claim terms as understood by those who conceived and practiced the inventions. To the extent the Court finds such testimony helpful in understanding the intrinsic record, OWS reserves the right to submit it in connection with its claim construction briefing.

OWS reserves the right to supplement this identification of extrinsic evidence as claim construction discovery proceeds and in connection with any subsequent claim construction briefing.

VI. CLAIM CHARTS

Pursuant to Patent Local Rule 4-1, OWS provides herewith claim charts for each asserted claim term requiring construction, identifying the claim language, OWS's proposed construction, and the specific intrinsic evidence supporting the proposed construction. These charts are attached as Exhibits A through D and are incorporated herein by reference. For the Court's convenience, the charts are also reproduced below.

Exhibit A: Claim Construction Chart — U.S. Patent No. 10,234,567

Exhibit B: Claim Construction Chart — U.S. Patent No. 10,891,234

Exhibit C: Claim Construction Chart — U.S. Patent No. 11,045,678

Exhibit D: Claim Construction Chart — U.S. Patent No. 11,312,890

VII. RESERVATION OF RIGHTS

OWS reserves the right to supplement, amend, or modify these Preliminary Claim Construction Contentions as permitted under the Patent Local Rules of the Northern District of California and by order of the Court. Without limiting the generality of the foregoing, OWS specifically reserves the following rights:

OWS reserves the right to identify additional claim terms requiring construction in its Responsive Claim Construction Contentions under Patent Local Rule 4-2, to the extent Lumos identifies additional terms or proposes constructions for additional terms in its own Preliminary Claim Construction Contentions. OWS further reserves the right to respond to any constructions proposed by Lumos and to present additional intrinsic and extrinsic evidence in support of OWS's positions in subsequent claim construction briefing.

OWS reserves all rights with respect to extrinsic evidence, including the right to submit expert declarations, technical dictionaries, treatises, technical publications, and inventor testimony in connection with subsequent claim construction briefing and the Markman hearing currently scheduled for January 30, 2023, before the Honorable Edward J. Torvelis.

OWS further reserves the right to modify its proposed constructions in light of the Court's guidance at any tutorial or hearing, in light of additional evidence developed during claim construction discovery, or in light of developments in the case that may affect the claim construction analysis.

Nothing in these Preliminary Claim Construction Contentions shall be deemed a waiver of any argument, defense, or right available to OWS, nor shall the identification of certain terms as requiring "plain and ordinary meaning" be deemed an admission that such terms are in dispute or that any particular construction is appropriate.

VIII. CERTIFICATE OF SERVICE

I hereby certify that on September 12, 2022, I caused a true and correct copy of the foregoing PLAINTIFF OPTIWAVE SEMICONDUCTOR CORP.'S PRELIMINARY CLAIM CONSTRUCTION CONTENTIONS PURSUANT TO PATENT LOCAL RULE 4-1, together with the accompanying Exhibits A through D, to be served by electronic means via the Court's CM/ECF system upon the following counsel of record for Defendant Lumos Photonics, Inc.:

Victoria "Tori" Ashworth Brannick Howell & Stein LLP 555 California Street, Suite 2800 San Francisco, California 94104 Telephone: (415) 555-7200

Email: tashworth@bhslaw.com

Daniel Kowalski Brannick Howell & Stein LLP 555 California Street, Suite 2800 San Francisco, California 94104 Telephone: (415) 555-7200

Email: dkowalski@bhslaw.com

Dated: September 12, 2022

Respectfully submitted,

CALDERWOOD & HARKNESS LLP

By: ________

Alan Ngo (Cal. Bar No. 287451; USPTO Reg. No. 52,871) Omar Siddiqui (Cal. Bar No. 301276) Christy Bauer (Cal. Bar No. 314098) CALDERWOOD & HARKNESS LLP One Embarcadero Center, 34th Floor San Francisco, California 94111 Telephone: (415) 773-5500 Facsimile: (415) 773-5501

Email: ango@calderwoodharkness.com

Email: osiddiqui@calderwoodharkness.com

Email: cbauer@calderwoodharkness.com

Attorneys for Plaintiff Optiwave Semiconductor Corp.

No.	Claim	Disputed Term	OWS's Proposed Construction	Supporting Intrinsic Evidence
1	1	"adiabatically coupled"	"coupled such that optical mode transitions occur without significant power loss"	'567 Patent, col. 4, ll. 15–32; col. 5, ll. 8–25; col. 7, ll. 1–18; Figs. 3A–3C; prosecution history (Nov. 8, 2018 amendment and remarks distinguishing U.S. Patent No. 9,456,012 (Tanaka)); claim differentiation (dependent Claims 4 and 7)
2	1	"tapered silicon waveguide having a tip width of less than 200 nanometers"	Plain and ordinary meaning (no construction necessary)	'567 Patent, col. 3, ll. 40–55; Table 1, col. 6
3	1	"silicon nitride waveguide layer"	Plain and ordinary meaning (no construction necessary)	'567 Patent, col. 4, ll. 1–14
No.	Claim	Disputed Term	OWS's Proposed Construction	Supporting Intrinsic Evidence
4	1	"graded buffer layer having a continuously varying germanium concentration"	"a buffer layer in which the germanium concentration changes across the layer thickness"	'234 Patent, col. 3, ll. 20–45; col. 5, ll. 30–50; col. 6, ll. 5–22; Figs. 4A, 4B; prosecution history (no narrowing amendment; allowed after examiner interview on Sept. 10, 2020)
5	1	"germanium absorber layer"	Plain and ordinary meaning (no construction necessary)	'234 Patent, col. 3, ll. 50–65
No.	Claim	Disputed Term	OWS's Proposed Construction	Supporting Intrinsic Evidence
6	1	"integrated wavelength-division multiplexing element monolithically formed on a single silicon die"	"a WDM component fabricated as part of the same semiconductor fabrication process on a single die"	'678 Patent, col. 4, ll. 5–50; col. 5, ll. 1–20; col. 7, ll. 10–30; prosecution history (Feb. 22, 2021 amendment adding "monolithically formed"; remarks distinguishing heterogeneous integration approaches for WDM element specifically); claim differentiation (dependent Claim 6)
7	1	"multi-channel optical transceiver"	Plain and ordinary meaning (no construction necessary)	'678 Patent, col. 2, ll. 45–60
8	1	"single silicon die"	Plain and ordinary meaning (no construction necessary)	'678 Patent, col. 4, ll. 5–15
No.	Claim	Disputed Term	OWS's Proposed Construction	Supporting Intrinsic Evidence
9	1	"pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate"	"an equalization circuit located on the same substrate as the modulator"	'890 Patent, col. 3, ll. 15–40; col. 5, ll. 1–20; col. 6, ll. 5–25; col. 7, ll. 10–30; prosecution history (Dec. 3, 2021 amendment and remarks stating co-integration includes monolithic, flip-chip, and interposer approaches); claim differentiation (dependent Claims 5 and 8)
10	1	"Mach-Zehnder modulator"	Plain and ordinary meaning (no construction necessary)	'890 Patent, col. 2, ll. 30–45

UNITED STATES DISTRICT COURT NORTHERN DISTRICT OF CALIFORNIA SAN JOSE DIVISION
OPTIWAVE SEMICONDUCTOR CORP.,
Plaintiff,
v.
LUMOS PHOTONICS, INC.,
Defendant.
Case No. 5:22-cv-03417-EJD
Hon. Edward J. Torvelis
PLAINTIFF OPTIWAVE SEMICONDUCTOR CORP.'S PRELIMINARY CLAIM CONSTRUCTION CONTENTIONS PURSUANT TO PATENT LOCAL RULE 4-1
Date: September 12, 2022
I. INTRODUCTION
Plaintiff Optiwave Semiconductor Corp. ("OWS") hereby respectfully submits its Preliminary Claim Construction Contentions pursuant to Patent Local Rule 4-1 of the Northern District of California. OWS files these contentions in accordance with the Court's Case Management Order entered on June 15, 2022 (Dkt. No. 42), and the parties' stipulated claim construction schedule filed on July 28, 2022 (Dkt. No. 58).
In this action, OWS asserts four United States Patents against Defendant Lumos Photonics, Inc. ("Lumos"), each of which relates to innovations in silicon photonics integrated circuit design and fabrication. The patents-in-suit are:
(a) U.S. Patent No. 10,234,567 ("the '567 Patent"), entitled "Integrated Waveguide Coupler with Tapered Mode Converter for Silicon Photonics Platforms," which issued on March 19, 2019;
(b) U.S. Patent No. 10,891,234 ("the '234 Patent"), entitled "Germanium-on-Silicon Photodetector with Graded Buffer Layer for Enhanced Responsivity," which issued on January 14, 2021;
(c) U.S. Patent No. 11,045,678 ("the '678 Patent"), entitled "Multi-Channel Optical Transceiver with Integrated Wavelength-Division Multiplexing on Silicon," which issued on June 29, 2021; and
(d) U.S. Patent No. 11,312,890 ("the '890 Patent"), entitled "Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators," which issued on April 26, 2022.
OWS is the owner by assignment of each of the patents-in-suit. Each patent was duly and lawfully issued by the United States Patent and Trademark Office after full and fair prosecution.
The accused products in this action are Lumos's LumosBridge™ 800G Optical Engine and LumosEdge™ 400ZR+ Pluggable Transceiver, as set forth in OWS's Disclosure of Asserted Claims and Infringement Contentions served pursuant to Patent Local Rule 3-1 on August 1, 2022.
OWS identifies below each claim term for which it contends construction is necessary and provides its proposed construction for each such term, together with specific citations to the intrinsic evidence supporting each proposed construction. For certain terms, OWS submits that the term carries its plain and ordinary meaning as understood by a person of ordinary skill in the art and does not require construction beyond what the claim language itself conveys. For other terms, OWS proposes constructions that faithfully reflect the meaning conveyed by the intrinsic record—including the claim language, specification, and prosecution history of each patent.
OWS identifies a total of eleven (11) claim terms across the four patents-in-suit, of which five (5) require affirmative construction and six (6) should be given their plain and ordinary meaning. These terms, the claims in which they appear, OWS's proposed constructions, and supporting intrinsic evidence are set forth in detail in Sections III and IV below, and are summarized in the Claim Construction Charts attached hereto as Exhibits A through D.
II. LEGAL STANDARD FOR CLAIM CONSTRUCTION
Claim construction is a matter of law to be determined by the Court. Markman v. Westview Instruments, Inc., 517 U.S. 370, 372 (1996). The Federal Circuit's en banc decision in Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005), provides the governing framework for claim construction.
Under Phillips, claim terms are to be construed as they would be understood by a person of ordinary skill in the art ("POSITA") at the time of the invention, in light of the specification and prosecution history. Phillips, 415 F.3d at 1313. The words of a claim are "generally given their ordinary and customary meaning," which is "the meaning that the term would have to a person of ordinary skill in the art in question at the time of the invention." Id. at 1312–13. This inquiry does not focus on the meaning of a term in the abstract, but rather on the meaning of the term in the context of the patent, including the particular claim in which the term appears. Id. at 1314.
For purposes of the patents-in-suit, OWS submits that a person of ordinary skill in the art at the relevant time (2017–2018) would be a person holding at least a master's degree in electrical engineering, applied physics, or a related field, with at least three years of professional experience in the design, fabrication, or characterization of silicon photonics integrated circuits, including waveguide structures, photodetectors, optical transceivers, and modulator driver architectures. Alternatively, a person of ordinary skill would hold at least a bachelor's degree in electrical engineering, applied physics, or a related field, with at least five years of such professional experience. Additional education or experience in one area may compensate for a lesser degree of expertise in another.
The intrinsic record—consisting of the claims themselves, the specification (including the written description and any drawings), and the prosecution history—is the primary source for determining the meaning of claim terms. Phillips, 415 F.3d at 1314–17. Of these, the specification is "the single best guide to the meaning of a disputed term." Id. at 1315 (quoting Ridgeway & Co. v. Conceptronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996)). The specification may act as a dictionary for claim terms, and the claims themselves provide "substantial guidance as to the meaning of particular claim terms." Id. at 1314. The prosecution history, which provides a complete record of all proceedings before the Patent and Trademark Office, may also inform the meaning of claim terms and may include any disclaimer or disavowal of claim scope. Id. at 1317.
Claim terms are given their plain and ordinary meaning as understood by a POSITA unless the patentee (1) acted as its own lexicographer by clearly setting forth a special definition of a term in the specification, or (2) clearly disclaimed or disavowed the full scope of the claim term either in the specification or during prosecution. Thorner v. Sony Comput. Entm't Am. LLC, 669 F.3d 1362, 1365 (Fed. Cir. 2012). Any such lexicographic definition must be set forth with "reasonable clarity, deliberateness, and precision." Ashford Corporation v. Ashgrove Partners LLC, 158 F.3d 1243, 1249 (Fed. Cir. 1998).
In construing claims, the Court should avoid importing limitations from the specification into the claims. Phillips, 415 F.3d at 1323. While the specification may describe a preferred embodiment of the invention, "the claims of the patent, not the patent's specification, define the scope of the patent right." Id. (citing Innova/Pure Water, Inc. v. Safari Water Filtration Sys., Inc., 381 F.3d 1111, 1115 (Fed. Cir. 2004)). The Federal Circuit has consistently cautioned that "it is improper to read limitations from a preferred embodiment described in the specification—even if it is the only embodiment—into the claims absent a clear indication in the intrinsic record that the patentee intended the claims to be so limited." Ashford Enterprises v. Dunmore Corporation, 358 F.3d 898, 906 (Fed. Cir. 2004).
Additionally, the doctrine of claim differentiation provides a presumption that each claim in a patent has a different scope. Phillips, 415 F.3d at 1315. Where a dependent claim adds a limitation to the independent claim from which it depends, this creates a presumption that the independent claim does not require that limitation. Id.
Extrinsic evidence—including expert testimony, inventor testimony, technical dictionaries, and treatises—may also be considered, but cannot be used to override the meaning conveyed by the intrinsic record. Phillips, 415 F.3d at 1318–19. Such evidence may be useful to "provide background on the technology at issue, to explain how an invention works, to ensure that the court's understanding of the technical aspects of the patent is consistent with that of a person of skill in the art, or to establish that a particular term in the patent or the prior art has a particular meaning in the pertinent field." Id. at 1318.
III. IDENTIFICATION OF ASSERTED CLAIMS
A. U.S. Patent No. 10,234,567 ("the '567 Patent")
The '567 Patent, entitled "Integrated Waveguide Coupler with Tapered Mode Converter for Silicon Photonics Platforms," was filed on March 14, 2017, and issued on March 19, 2019. The named inventors are Dr. Kevin Fong, Dr. Priya Ramanathan, and Hideo Tanaka. The '567 Patent is directed to integrated optical coupling structures for silicon photonics platforms, and more specifically to tapered mode converters that facilitate efficient optical mode transfer between silicon and silicon nitride waveguide layers.
OWS asserts Claims 1, 4, 7, 12, and 15 of the '567 Patent. Claim 1 is an independent claim. Claims 4, 7, 12, and 15 are dependent claims that depend directly or indirectly from Claim 1 and add additional limitations specifying, inter alia, particular taper geometries, coupling efficiency parameters, and integration configurations.
B. U.S. Patent No. 10,891,234 ("the '234 Patent")
The '234 Patent, entitled "Germanium-on-Silicon Photodetector with Graded Buffer Layer for Enhanced Responsivity," was filed on September 8, 2017, and issued on January 14, 2021. The named inventors are Dr. Kevin Fong and Dr. Amara Osei. The '234 Patent is directed to germanium-on-silicon photodetector structures incorporating a graded buffer layer to reduce threading dislocation density and thereby enhance photodetector responsivity at near-infrared wavelengths commonly used in optical communications.
OWS asserts Claims 1, 3, 5, 8, and 11 of the '234 Patent. Claim 1 is an independent claim. Claims 3, 5, 8, and 11 are dependent claims that depend directly or indirectly from Claim 1 and add additional limitations specifying, inter alia, particular concentration profiles, buffer layer thicknesses, and detector geometry configurations.
C. U.S. Patent No. 11,045,678 ("the '678 Patent")
The '678 Patent, entitled "Multi-Channel Optical Transceiver with Integrated Wavelength-Division Multiplexing on Silicon," was filed on June 22, 2018, and issued on June 29, 2021. The named inventors are Dr. Priya Ramanathan, Dr. Amara Osei, and Liwei Zhang. The '678 Patent is directed to multi-channel optical transceiver architectures in which wavelength-division multiplexing functionality is monolithically integrated on a single silicon die, thereby achieving cost, yield, and alignment advantages over conventional hybrid integration approaches.
OWS asserts Claims 1, 2, 6, 9, and 14 of the '678 Patent. Claim 1 is an independent claim. Claims 2, 6, 9, and 14 are dependent claims that depend directly or indirectly from Claim 1 and add additional limitations specifying, inter alia, particular WDM element types, integration levels for other on-die components, channel counts, and wavelength spacing configurations.
D. U.S. Patent No. 11,312,890 ("the '890 Patent")
The '890 Patent, entitled "Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators," was filed on November 15, 2018, and issued on April 26, 2022. The named inventors are Dr. Kevin Fong and Rajesh Iyer. The '890 Patent is directed to driver circuit architectures in which a pre-emphasis equalization stage is co-integrated with a Mach-Zehnder modulator on a common substrate, thereby reducing parasitic interconnect effects and improving signal integrity at high data rates.
OWS asserts Claims 1, 5, 8, and 13 of the '890 Patent. Claim 1 is an independent claim. Claims 5, 8, and 13 are dependent claims that depend directly or indirectly from Claim 1 and add additional limitations specifying, inter alia, particular integration methodologies, equalization circuit configurations, and modulator operating parameters.
IV. CLAIM TERMS REQUIRING CONSTRUCTION AND OWS'S PROPOSED CONSTRUCTIONS
OWS identifies below each claim term for which it contends construction is necessary or for which a dispute may exist, together with its proposed construction and citations to supporting intrinsic evidence. For ease of reference, OWS addresses the terms patent-by-patent.
A. Terms from U.S. Patent No. 10,234,567 ("the '567 Patent")
1. "adiabatically coupled" (Claim 1)
Claim Context. Claim 1 of the '567 Patent recites, in relevant part:
An integrated optical coupler comprising a tapered silicon waveguide having a tip width of less than 200 nanometers adiabatically coupled to a silicon nitride waveguide layer…
OWS's Proposed Construction: "coupled such that optical mode transitions occur without significant power loss."
Intrinsic Evidence in Support of OWS's Proposed Construction.
Specification. The '567 Patent specification provides extensive guidance as to the meaning of "adiabatically coupled" as understood by a person of ordinary skill in the art. At column 4, lines 15–32, the specification describes adiabatic coupling as a process in which "optical energy transfers between waveguides with minimal loss, such that the fundamental mode of the input waveguide evolves smoothly into the fundamental mode of the output waveguide without excitation of higher-order or radiative modes." This passage confirms that the hallmark of adiabatic coupling is the avoidance of significant optical power loss during the mode transition—not any particular physical structure or taper geometry.
The specification further discloses multiple embodiments of adiabatic coupling, demonstrating that the term encompasses range structural implementations. At column 5, lines 8–25, the specification states: "Adiabatic coupling may be achieved through various taper geometries including gradual continuous tapers, segmented tapers, and multi-stage transitions, provided the mode transition is sufficiently slow to avoid excitation of radiative modes." Figures 3A, 3B, and 3C illustrate, respectively, a continuous linear taper, a nonlinear parabolic taper, and a multi-segment taper with discrete sections of differing widths, all described as embodiments of "adiabatic coupling." See also '567 Patent, col. 7, ll. 1–18 (describing simulated coupling efficiencies for each of these taper geometries and confirming that each achieves adiabatic mode transition with measured losses below 0.5 dB).
OWS's proposed construction faithfully captures the functional essence of the term "adiabatically coupled" as used throughout the specification—namely, that optical mode transitions occur without significant power loss—without improperly limiting the claim to any single disclosed embodiment or taper geometry. The construction is consistent with the specification's express statement that multiple structural approaches can achieve adiabatic coupling, and it avoids the error of reading a preferred embodiment limitation into the claim.
Prosecution History. The prosecution history confirms OWS's proposed construction. During prosecution of the '567 Patent, the term "adiabatically coupled" was added to Claim 1 by amendment filed on November 8, 2018, in response to a non-final Office Action rejecting Claim 1 under 35 U.S.C. § 102 as anticipated by U.S. Patent No. 9,456,012 (Tanaka). In the accompanying remarks, the applicant distinguished the Tanaka reference on the ground that Tanaka's coupler structure employed an abrupt mode transition that did not achieve adiabatic mode transfer—i.e., that Tanaka's coupler did "not prevent significant power loss during mode transition" due to the abrupt nature of the coupling region. The remarks stated:
"The present invention is distinguished from Tanaka because the claimed coupler achieves adiabatic coupling between the tapered silicon waveguide and the silicon nitride waveguide layer. In Tanaka, the mode transition occurs abruptly across a short coupling length, resulting in significant excitation of higher-order and radiative modes. By contrast, the present claims require that the coupling be adiabatic—i.e., that the optical mode transitions occur without significant power loss."
These remarks confirm that the amendment was directed to the functional result of adiabatic coupling—the avoidance of significant power loss during mode transition—and not to any particular structural taper configuration. The applicant did not state, either in the amendment or the remarks, that "adiabatically coupled" requires a continuous taper, a particular taper length, or any other specific structural feature. Accordingly, OWS's amendment narrowed the claim by adding the "adiabatically coupled" limitation, but did not disclaim any particular structural approach to achieving adiabatic coupling. The scope of any prosecution history estoppel under Festo Corp. v. Fenmore & Co., 535 U.S. 722 (2002), is limited to the specific prior art surrendered (i.e., non-adiabatic couplers such as Tanaka's abrupt coupler), not to particular structural implementations of adiabatic coupling.
Claim Differentiation. The doctrine of claim differentiation further supports OWS's proposed construction and confirms that "adiabatically coupled" in independent Claim 1 is not limited to any particular taper geometry. Dependent Claim 4 of the '567 Patent adds the limitation that the tapered silicon waveguide has "a continuous taper profile." Dependent Claim 7 adds the limitation that the tapered silicon waveguide has "a multi-segment taper comprising at least three discrete taper sections of differing widths." If independent Claim 1's use of "adiabatically coupled" were construed to require a continuous taper, then dependent Claim 7—which specifically claims a multi-segment (non-continuous) taper—would be either superfluous or self-contradictory. Under the doctrine of claim differentiation, such a construction must be rejected. See Phillips, 415 F.3d at 1315; Curtiss-Wright Flow Control Corp. v. Velan, Inc., 438 F.3d 1374, 1380 (Fed. Cir. 2006). OWS's proposed construction—"coupled such that optical mode transitions occur without significant power loss"—avoids this result and gives independent meaning to both dependent Claims 4 and 7.
2. "tapered silicon waveguide having a tip width of less than 200 nanometers" (Claim 1)
Claim Context. Claim 1 of the '567 Patent recites, in relevant part:
An integrated optical coupler comprising a tapered silicon waveguide having a tip width of less than 200 nanometers adiabatically coupled to a silicon nitride waveguide layer…
OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "a silicon waveguide that narrows along its length to a terminal tip having a width dimension of less than 200 nm."
Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '567 Patent at column 3, lines 40–55, describes the tip width as a critical dimension for achieving effective mode matching between the silicon waveguide and the underlying or adjacent silicon nitride waveguide layer. The specification explains that as the silicon waveguide narrows to sub-200-nanometer tip widths, the optical mode is progressively deconfined from the high-index silicon core and transitions to the lower-index silicon nitride waveguide. Table 1 at column 6 of the specification provides experimental data for tip widths ranging from 80 nm to 195 nm, confirming that all tip widths within this range are below the claimed 200 nm upper bound.
The term "tip width" has a well-understood meaning in the field of silicon photonics and waveguide design. It refers to the narrowest cross-sectional width dimension of a waveguide taper at its terminal end—i.e., the point at which the taper terminates. The specification uses this term in its ordinary sense, and OWS submits that no construction beyond the plain and ordinary meaning is required. The numerical limitation "less than 200 nanometers" is clear on its face and requires no further interpretation.
3. "silicon nitride waveguide layer" (Claim 1)
Claim Context. Claim 1 of the '567 Patent recites a tapered silicon waveguide "adiabatically coupled to a silicon nitride waveguide layer."
OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "a waveguide formed of silicon nitride (SiN or Si₃N₄) material."
Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '567 Patent at column 4, lines 1–14, describes silicon nitride waveguide layers of varying stoichiometries, including both stoichiometric silicon nitride (Si₃N₄) and silicon-rich silicon nitride (SiNₓ where x < 4/3), deposited by low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD) processes. The specification does not limit the term "silicon nitride waveguide layer" to a particular stoichiometry, deposition method, or layer thickness. The term is used throughout the specification in its ordinary and customary sense as understood by those skilled in integrated photonics, and OWS submits that no construction beyond the plain and ordinary meaning is required.
B. Terms from U.S. Patent No. 10,891,234 ("the '234 Patent")
4. "graded buffer layer having a continuously varying germanium concentration" (Claim 1)
Claim Context. Claim 1 of the '234 Patent recites, in relevant part:
A germanium-on-silicon photodetector structure comprising… a graded buffer layer having a continuously varying germanium concentration disposed between a silicon substrate and a germanium absorber layer…
OWS's Proposed Construction: "a buffer layer in which the germanium concentration changes across the layer thickness."
Intrinsic Evidence in Support of OWS's Proposed Construction.
Specification. The '234 Patent specification provides detailed guidance as to the meaning and scope of the term "graded buffer layer having a continuously varying germanium concentration." At column 3, lines 20–45, the specification describes the graded buffer layer as a structural feature that provides "a gradual transition in lattice constant from the silicon substrate to the germanium absorber layer, thereby reducing the density of threading dislocations that would otherwise propagate into the active germanium absorber region." The specification explains that a high threading dislocation density in the germanium absorber layer degrades photodetector responsivity and increases dark current, and that the graded buffer layer addresses these problems by accommodating the 4.2% lattice mismatch between silicon and germanium through a progressive change in composition.
Critically, the specification describes two distinct types of graded buffer layer implementations as embodiments of the claimed invention. At column 5, lines 30–50, the specification describes a first embodiment in which the germanium concentration increases linearly from a low value (e.g., Si₀.₉Ge₀.₁) adjacent to the silicon substrate to a high value (e.g., Si₀.₁Ge₀.₉ or pure Ge) adjacent to the germanium absorber layer. This embodiment is illustrated in Figure 4A, which shows a buffer layer with a smooth, linearly increasing germanium concentration profile (continuous grading). At column 6, lines 5–22, the specification describes a second embodiment in which the germanium concentration increases in a stepwise fashion through multiple discrete composition plateaus—for example, four steps of approximately 25 at.% germanium each. This embodiment is illustrated in Figure 4B, which shows a buffer layer with a stepwise increasing germanium concentration profile with multiple discrete composition steps. The specification expressly describes the Figure 4B embodiment as an "alternative embodiment of the graded buffer layer" in which the "germanium concentration varies continuously in the sense that it progresses through a series of increasing concentration levels across the buffer layer thickness."
The specification uses the phrase "continuously varying" to refer to a germanium concentration that changes—i.e., that varies in a continuous progression—across the buffer layer thickness, as contrasted with a uniform (constant) composition layer in which the germanium concentration does not change at all. This usage encompasses both smooth (analog) gradients and step-graded (digital) profiles where the concentration progresses through a series of increasing steps. The specification states at column 3, lines 28–33: "The germanium concentration in the buffer layer continuously varies from a low concentration adjacent to the silicon substrate to a high concentration adjacent to the absorber." Both Figures 4A and 4B are described as showing embodiments of this continuously varying concentration.
OWS's proposed construction—"a buffer layer in which the germanium concentration changes across the layer thickness"—faithfully captures the specification's use of "continuously varying" to mean that the germanium concentration changes (rather than remaining constant) across the buffer layer. This construction does not improperly limit the claim to the smooth gradient embodiment of Figure 4A, nor does it exclude the step-graded embodiment of Figure 4B, both of which are expressly disclosed as embodiments of the claimed graded buffer layer.
Prosecution History. The prosecution history of the '234 Patent contains no basis for narrowing the scope of this term. The '234 Patent was allowed on the first Office Action following an examiner interview conducted on September 10, 2020. During the interview, the examiner and applicant discussed the prior art of record, and the examiner agreed that the claims as originally filed were allowable. The applicant did not amend the claims to narrow "continuously varying" and made no written statements during prosecution distinguishing step-graded from continuously graded buffer layers. Accordingly, no prosecution history estoppel applies, and there is no basis for construing this term more narrowly than the specification supports.
5. "germanium absorber layer" (Claim 1)
Claim Context. Claim 1 of the '234 Patent recites a graded buffer layer "disposed between a silicon substrate and a germanium absorber layer."
OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "a layer composed primarily of germanium that absorbs incident photons to generate charge carriers."
Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '234 Patent at column 3, lines 50–65, describes the germanium absorber layer and its function in photodetection. The specification explains that the germanium absorber layer is the active region of the photodetector in which incident photons at near-infrared wavelengths (specifically, 1310 nm and 1550 nm, the standard wavelengths for optical communications) are absorbed to generate electron-hole pairs that are collected as photocurrent. The term "germanium absorber layer" is used throughout the specification in its ordinary and customary sense as understood by those skilled in the art of semiconductor photodetectors, and OWS submits that no construction beyond the plain and ordinary meaning is required.
6. "enhanced responsivity" (Title; referenced in dependent claims)
OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary.
Intrinsic Evidence. The term "enhanced responsivity" appears in the title of the '234 Patent and is referenced in the context of certain dependent claims describing the advantages of the graded buffer layer structure. The specification at column 2, lines 10–25, discusses the well-known problem of high threading dislocation density in germanium-on-silicon photodetectors, which degrades responsivity by creating non-radiative recombination centers that reduce photogenerated carrier collection efficiency. The specification describes the graded buffer layer as providing the solution to this problem by reducing dislocation density, thereby "enhancing" the responsivity of the resulting photodetector as compared to devices fabricated without such a buffer layer. The term "enhanced responsivity" is used in its ordinary descriptive sense—indicating improved responsivity relative to a baseline—and does not define a specific numerical threshold or figure of merit. OWS submits that no construction beyond the plain and ordinary meaning is necessary.
C. Terms from U.S. Patent No. 11,045,678 ("the '678 Patent")
7. "integrated wavelength-division multiplexing element monolithically formed on a single silicon die" (Claim 1)
Claim Context. Claim 1 of the '678 Patent recites, in relevant part:
A multi-channel optical transceiver comprising… an integrated wavelength-division multiplexing element monolithically formed on a single silicon die…
OWS's Proposed Construction: "a WDM component fabricated as part of the same semiconductor fabrication process on a single die."
Intrinsic Evidence in Support of OWS's Proposed Construction.
Specification. The '678 Patent specification provides detailed guidance as to the meaning of "integrated wavelength-division multiplexing element monolithically formed on a single silicon die." At column 4, lines 5–30, the specification describes monolithic integration as a fabrication approach in which the WDM element—which may take the form of an arrayed waveguide grating (AWG), an echelle grating, a cascaded Mach-Zehnder interferometer filter, or other wavelength-selective structures—is "formed on the same silicon die as the other transceiver components using standard semiconductor fabrication processes." The specification explains that this monolithic approach achieves significant advantages over hybrid integration, including lower cost, higher fabrication yield, and inherently superior alignment precision because the WDM element and other photonic components are defined by the same lithographic process. See '678 Patent, col. 4, ll. 31–50 (comparing monolithic and hybrid approaches and discussing the alignment, cost, and yield benefits of monolithic integration of the WDM element).
The specification further describes specific embodiments in which monolithic integration of the WDM element is accomplished using CMOS-compatible front-end-of-line (FEOL) and back-end-of-line (BEOL) processing on a silicon-on-insulator (SOI) wafer. See '678 Patent, col. 5, ll. 1–20 (describing patterning of waveguides, modulators, and the WDM element in the silicon device layer of an SOI wafer using standard 193 nm deep-UV lithography). The specification also describes embodiments in which certain non-WDM components—specifically, gain elements such as III-V semiconductor laser sources—may be added to the silicon die using wafer-bonding or transfer-printing techniques, while the WDM element itself remains monolithically formed on the silicon die using the native silicon fabrication process. See '678 Patent, col. 7, ll. 10–30 (describing an embodiment in which InP-based laser gain sections are bonded to the SOI wafer to provide on-chip gain, while the AWG multiplexer/demultiplexer is monolithically formed in the silicon device layer).
OWS's proposed construction—"a WDM component fabricated as part of the same semiconductor fabrication process on a single die"—accurately captures the specification's description of monolithic formation. The construction requires that the WDM element itself be fabricated using the semiconductor fabrication process that forms the die, rather than being separately fabricated and subsequently attached (as in hybrid integration). This construction is consistent with the specification's use of "monolithically formed" to distinguish the claimed invention from hybrid integration approaches in which the WDM element is fabricated on a separate substrate and then assembled onto the transceiver platform.
Prosecution History. The prosecution history confirms OWS's proposed construction and establishes that "monolithically formed" was added to distinguish the WDM element from hybrid WDM components, not to impose a blanket requirement that all components on the die be monolithically integrated. During prosecution of the '678 Patent, the term "monolithically formed" was added by amendment filed on February 22, 2021, in response to a non-final Office Action rejecting Claim 1 under 35 U.S.C. § 103 as obvious over a combination of prior art references disclosing hybrid integration approaches for WDM functionality. In the accompanying remarks, the applicant stated:
"The present invention is distinguished from [the cited references'] heterogeneous integration approaches. In the claimed invention, the wavelength-division multiplexing element is monolithically formed on the single silicon die—i.e., fabricated as part of the same semiconductor fabrication process that forms the silicon photonic die—rather than being separately fabricated on a different material platform and subsequently bonded or assembled onto the transceiver substrate."
This remark was directed specifically at the WDM element and at the prior art's use of hybrid integration for the WDM component. The applicant did not disclaim all forms of heterogeneous integration for non-WDM components on the same die. Indeed, the specification's disclosure of embodiments in which III-V gain elements are added by bonding (col. 7, ll. 10–30) confirms that the amendment was not intended to require monolithic integration of every component on the die—only the WDM element.
Claim Language. The claim language itself confirms that "monolithically formed" modifies only the "wavelength-division multiplexing element," not the entire transceiver. The phrase "an integrated wavelength-division multiplexing element monolithically formed on a single silicon die" specifies the fabrication method for the WDM element. Other components of the "multi-channel optical transceiver" recited in Claim 1 are not modified by the "monolithically formed" limitation. OWS's proposed construction reflects this grammatical structure.
Claim Differentiation. The doctrine of claim differentiation provides additional support for OWS's construction. Dependent Claim 6 of the '678 Patent adds the limitation that "all active and passive optical components are monolithically integrated on the single silicon die." If independent Claim 1 already required all components to be monolithically integrated, then dependent Claim 6 would be superfluous. The existence of Claim 6 demonstrates that the scope of independent Claim 1 is broader than Claim 6—i.e., that independent Claim 1 requires only the WDM element to be monolithically formed, while other components may or may not be monolithically integrated. See Phillips, 415 F.3d at 1315.
8. "multi-channel optical transceiver" (Claim 1)
Claim Context. Claim 1 of the '678 Patent recites, in relevant part: "A multi-channel optical transceiver comprising…"
OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "an optical transceiver capable of simultaneously transmitting and/or receiving optical signals on multiple wavelength channels."
Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '678 Patent at column 2, lines 45–60, defines multi-channel transceivers and describes their use in data center interconnects and telecommunications applications. The specification explains that multi-channel transceivers utilize wavelength-division multiplexing to transmit and/or receive multiple data streams simultaneously on different optical wavelength channels over a common optical fiber. The term "multi-channel optical transceiver" is used throughout the specification in its ordinary and customary sense as understood by those skilled in the art of optical communications, and OWS submits that no construction beyond the plain and ordinary meaning is required.
9. "single silicon die" (Claim 1)
Claim Context. Claim 1 of the '678 Patent recites a WDM element "monolithically formed on a single silicon die."
OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "a single unitary piece of silicon substrate on which semiconductor devices are fabricated."
Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '678 Patent at column 4, lines 5–15, uses the term "single silicon die" in its conventional meaning as understood by those skilled in semiconductor fabrication. The term refers to a single unitary piece of silicon substrate—typically a die cut from a processed silicon wafer—on which semiconductor devices (including photonic and electronic components) are fabricated using standard semiconductor fabrication processes. The specification does not ascribe any special or unusual meaning to this term, and OWS submits that it requires no construction beyond its plain and ordinary meaning.
D. Terms from U.S. Patent No. 11,312,890 ("the '890 Patent")
10. "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate" (Claim 1)
Claim Context. Claim 1 of the '890 Patent recites, in relevant part:
A driver circuit architecture for a silicon photonic Mach-Zehnder modulator, comprising: a pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate…
OWS's Proposed Construction: "an equalization circuit located on the same substrate as the modulator."
Intrinsic Evidence in Support of OWS's Proposed Construction.
Specification. The '890 Patent specification provides extensive disclosure concerning the meaning and scope of "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate." At column 3, lines 15–40, the specification describes co-integration as "the placement of the driver equalization circuitry and the Mach-Zehnder modulator on a common substrate, enabling reduced parasitic interconnect effects, reduced signal path length, and improved signal integrity at high data rates exceeding 50 Gbaud." The specification explains that prior art approaches typically employed driver circuitry fabricated on a separate printed circuit board (PCB) or separate semiconductor die connected to the modulator via wire bonds, resulting in parasitic inductance and capacitance that degraded high-frequency signal performance. The co-integration approach of the claimed invention eliminates or substantially reduces these parasitic effects by placing the equalization circuitry on the same substrate as the modulator.
The specification describes three distinct implementations of co-integration, each of which constitutes an embodiment of the claimed invention:
(a) Monolithic co-integration (col. 5, ll. 1–20): An embodiment in which the driver equalization circuitry is fabricated in the same CMOS process layers as the Mach-Zehnder modulator on a single silicon-on-insulator (SOI) substrate. In this embodiment, both the modulator (formed in the silicon device layer) and the driver circuitry (formed using CMOS transistors in the same or adjacent process layers) share the same substrate, the same lithographic patterning, and the same back-end-of-line metallization.
(b) Flip-chip bonded co-integration (col. 6, ll. 5–25): An embodiment in which the driver circuitry is fabricated on a separate semiconductor die that is subsequently bonded to the modulator substrate via flip-chip solder bump interconnects. In this embodiment, the bonded assembly constitutes the "common substrate," and the flip-chip interconnects provide the electrical connection between the equalization stage and the modulator with significantly lower parasitic effects than wire bonds.
(c) Interposer-based co-integration (col. 7, ll. 10–30): An embodiment in which a silicon interposer serves as the common substrate for both the modulator die and the driver die. The modulator die and the driver die are each bonded to the silicon interposer, which provides high-density electrical interconnects (e.g., through-silicon vias and redistribution layers) between the equalization stage and the modulator.
The specification's express disclosure of three distinct co-integration implementations demonstrates that the term "co-integrated… on a common substrate" is not limited to any single integration methodology. The key requirement is that the equalization stage and the modulator be located on the same substrate, whether that substrate is a single monolithically fabricated die, a flip-chip bonded assembly, or an interposer-based assembly.
The specification further provides an express definition of "common substrate" at column 3, lines 35–40, which states: "As used herein, 'common substrate' refers to a substrate that physically supports and electrically connects both the modulator and the equalization stage, including a single semiconductor die, a multi-die assembly on a common interposer, or a flip-chip bonded stack." This definition confirms that the patentee used "common substrate" broadly to encompass multiple physical configurations, provided that the substrate physically supports and electrically connects both the modulator and the equalization stage.
OWS's proposed construction—"an equalization circuit located on the same substrate as the modulator"—faithfully reflects the specification's broad use of "co-integrated… on a common substrate" and does not improperly limit the claim to any one of the three disclosed co-integration implementations. The construction captures the essential requirement of the claim: that the equalization circuit and the modulator share the same substrate.
Prosecution History. The prosecution history confirms OWS's proposed construction. During prosecution of the '890 Patent, the "co-integrated" limitation was added to Claim 1 by amendment filed on December 3, 2021, in response to a non-final Office Action rejecting Claim 1 under 35 U.S.C. § 102 as anticipated by U.S. Patent Publication No. 2016/0112789 (Liu), which disclosed a driver circuit connected to a Mach-Zehnder modulator via wire bonds from a separate PCB. In the accompanying remarks, the applicant stated:
"The present invention achieves co-integration by placing the equalization stage on the same substrate as the modulator, whether through monolithic fabrication, flip-chip bonding, or interposer-based assembly. Liu's driver circuit, by contrast, resides on a separate PCB and is connected to the modulator by wire bonds, which introduce significant parasitic inductance that degrades high-frequency performance. The claims, as amended, require that the pre-emphasis equalization stage be 'electrically co-integrated with the modulator on a common substrate,' which excludes Liu's external, wire-bonded driver arrangement."
These remarks confirm two important points. First, the applicant expressly stated that "co-integration" encompasses monolithic fabrication, flip-chip bonding, and interposer-based assembly—i.e., all three implementations disclosed in the specification. The applicant did not limit "co-integrated" to any single integration methodology. Second, the amendment was directed at distinguishing a specific type of prior art configuration—a driver circuit on a separate PCB connected by wire bonds—not at limiting the claim to a particular structural embodiment of co-integration. Accordingly, any prosecution history estoppel is narrow and limited to external, wire-bonded driver arrangements of the type disclosed in Liu.
Claim Differentiation. The doctrine of claim differentiation provides additional support for OWS's broad construction. Dependent Claim 5 of the '890 Patent adds the limitation "wherein the pre-emphasis equalization stage and the modulator share the same doping profiles and semiconductor process layers." This limitation specifies monolithic co-integration—i.e., an embodiment in which the equalization stage and the modulator are fabricated in the same semiconductor process on the same die. If independent Claim 1 already required monolithic co-integration, Claim 5 would be superfluous. The existence of Claim 5 confirms that independent Claim 1 does not require the equalization stage and modulator to be fabricated in the same semiconductor process.
Similarly, dependent Claim 8 adds the limitation "wherein the equalization stage is flip-chip bonded to the modulator substrate." This limitation specifies the flip-chip bonded co-integration embodiment. The existence of Claim 8 confirms that "co-integrated… on a common substrate" in Claim 1 encompasses flip-chip bonded configurations, and further confirms that independent Claim 1 is not limited to flip-chip bonding. Under the doctrine of claim differentiation, independent Claim 1 must be broader than both Claims 5 and 8, encompassing all forms of co-integration on a common substrate. See Phillips, 415 F.3d at 1315.
11. "Mach-Zehnder modulator" (Claim 1)
Claim Context. Claim 1 of the '890 Patent recites "a driver circuit architecture for a silicon photonic Mach-Zehnder modulator."
OWS's Proposed Construction: Plain and ordinary meaning; no construction necessary. If the Court determines that construction is necessary, OWS proposes: "an optical modulator based on the Mach-Zehnder interferometer architecture, in which an input optical signal is split into two arms, phase-modulated, and recombined to produce amplitude modulation."
Intrinsic Evidence in Support of OWS's Proposed Construction. The specification of the '890 Patent at column 2, lines 30–45, describes Mach-Zehnder modulators in the context of silicon photonic transmitters. The specification explains that a Mach-Zehnder modulator operates by splitting an input optical signal into two waveguide arms, applying a differential phase shift between the arms (typically using carrier-depletion or carrier-injection mechanisms in silicon), and recombining the signals so that the phase difference translates into amplitude modulation of the output optical signal. The term "Mach-Zehnder modulator" is universally understood in the field of silicon photonics and optical communications, and the specification uses it in its ordinary and customary sense. OWS submits that no construction beyond the plain and ordinary meaning is required.
V. EXTRINSIC EVIDENCE TO BE RELIED UPON
OWS identifies the following categories of extrinsic evidence that it may rely upon in support of its proposed claim constructions during claim construction briefing and at the Markman hearing, to the extent such evidence is relevant and does not override the intrinsic record:
Expert Testimony. OWS intends to rely upon the declaration and/or testimony of Dr. Harold Whitfield, Ph.D., Professor Emeritus of Electrical Engineering at the University of California, Santa Barbara, and principal of Whitfield Technical Consulting Group, Inc., located in Palo Alto, California. Dr. Whitfield has over thirty years of experience in the design, fabrication, and characterization of silicon photonics integrated circuits, including waveguide couplers, germanium-on-silicon photodetectors, optical transceivers, and modulator driver circuits. Dr. Whitfield is expected to testify regarding the understanding of a person of ordinary skill in the art of the disputed claim terms at the time of the relevant inventions (2017–2018), including the ordinary and customary meaning of the claim terms at issue, the technical context in which those terms are used, and the manner in which the intrinsic record would inform a POSITA's understanding of those terms.
Technical Dictionaries and Treatises. OWS may rely upon standard reference works in the fields of integrated photonics and semiconductor fabrication, including recognized textbooks on silicon photonics, waveguide theory, optical transceiver design, and photodetector design. Specific treatises and reference works to be relied upon will be identified in subsequent claim construction filings. These works may include, without limitation, treatises on silicon photonic device physics, optical interconnect architectures, and semiconductor process integration.
Technical Publications. OWS may rely upon peer-reviewed journal articles and conference papers in the field of silicon photonics integrated circuits published contemporaneously with the filing dates of the patents-in-suit (approximately 2017–2018). Such publications may be used to demonstrate the meaning of disputed claim terms in the art at the relevant time, the state of the art with respect to the technologies disclosed in the patents-in-suit, and the level of ordinary skill in the art. Specific publications to be relied upon will be identified in subsequent claim construction filings.
Inventor Testimony. OWS may rely upon deposition testimony of the named inventors of the patents-in-suit—specifically, Dr. Kevin Fong, Dr. Priya Ramanathan, Dr. Amara Osei, Hideo Tanaka, Liwei Zhang, and Rajesh Iyer—as may be taken during claim construction discovery. Such testimony may provide background on the technology at issue, the context of the inventions, and the meaning of claim terms as understood by those who conceived and practiced the inventions. To the extent the Court finds such testimony helpful in understanding the intrinsic record, OWS reserves the right to submit it in connection with its claim construction briefing.
OWS reserves the right to supplement this identification of extrinsic evidence as claim construction discovery proceeds and in connection with any subsequent claim construction briefing.
VI. CLAIM CHARTS
Pursuant to Patent Local Rule 4-1, OWS provides herewith claim charts for each asserted claim term requiring construction, identifying the claim language, OWS's proposed construction, and the specific intrinsic evidence supporting the proposed construction. These charts are attached as Exhibits A through D and are incorporated herein by reference. For the Court's convenience, the charts are also reproduced below.
Exhibit A: Claim Construction Chart — U.S. Patent No. 10,234,567
Exhibit B: Claim Construction Chart — U.S. Patent No. 10,891,234
Exhibit C: Claim Construction Chart — U.S. Patent No. 11,045,678
Exhibit D: Claim Construction Chart — U.S. Patent No. 11,312,890
VII. RESERVATION OF RIGHTS
OWS reserves the right to supplement, amend, or modify these Preliminary Claim Construction Contentions as permitted under the Patent Local Rules of the Northern District of California and by order of the Court. Without limiting the generality of the foregoing, OWS specifically reserves the following rights:
OWS reserves the right to identify additional claim terms requiring construction in its Responsive Claim Construction Contentions under Patent Local Rule 4-2, to the extent Lumos identifies additional terms or proposes constructions for additional terms in its own Preliminary Claim Construction Contentions. OWS further reserves the right to respond to any constructions proposed by Lumos and to present additional intrinsic and extrinsic evidence in support of OWS's positions in subsequent claim construction briefing.
OWS reserves all rights with respect to extrinsic evidence, including the right to submit expert declarations, technical dictionaries, treatises, technical publications, and inventor testimony in connection with subsequent claim construction briefing and the Markman hearing currently scheduled for January 30, 2023, before the Honorable Edward J. Torvelis.
OWS further reserves the right to modify its proposed constructions in light of the Court's guidance at any tutorial or hearing, in light of additional evidence developed during claim construction discovery, or in light of developments in the case that may affect the claim construction analysis.
Nothing in these Preliminary Claim Construction Contentions shall be deemed a waiver of any argument, defense, or right available to OWS, nor shall the identification of certain terms as requiring "plain and ordinary meaning" be deemed an admission that such terms are in dispute or that any particular construction is appropriate.
VIII. CERTIFICATE OF SERVICE
I hereby certify that on September 12, 2022, I caused a true and correct copy of the foregoing PLAINTIFF OPTIWAVE SEMICONDUCTOR CORP.'S PRELIMINARY CLAIM CONSTRUCTION CONTENTIONS PURSUANT TO PATENT LOCAL RULE 4-1, together with the accompanying Exhibits A through D, to be served by electronic means via the Court's CM/ECF system upon the following counsel of record for Defendant Lumos Photonics, Inc.:
Victoria "Tori" Ashworth Brannick Howell & Stein LLP 555 California Street, Suite 2800 San Francisco, California 94104 Telephone: (415) 555-7200
Email: tashworth@bhslaw.com
Daniel Kowalski Brannick Howell & Stein LLP 555 California Street, Suite 2800 San Francisco, California 94104 Telephone: (415) 555-7200
Email: dkowalski@bhslaw.com
Dated: September 12, 2022
Respectfully submitted,
CALDERWOOD & HARKNESS LLP
By: ________
Alan Ngo (Cal. Bar No. 287451; USPTO Reg. No. 52,871) Omar Siddiqui (Cal. Bar No. 301276) Christy Bauer (Cal. Bar No. 314098) CALDERWOOD & HARKNESS LLP One Embarcadero Center, 34th Floor San Francisco, California 94111 Telephone: (415) 773-5500 Facsimile: (415) 773-5501
Email: ango@calderwoodharkness.com
Email: osiddiqui@calderwoodharkness.com
Email: cbauer@calderwoodharkness.com
Attorneys for Plaintiff Optiwave Semiconductor Corp.
No. | Claim | Disputed Term | OWS's Proposed Construction | Supporting Intrinsic Evidence
1 | 1 | "adiabatically coupled" | "coupled such that optical mode transitions occur without significant power loss" | '567 Patent, col. 4, ll. 15–32; col. 5, ll. 8–25; col. 7, ll. 1–18; Figs. 3A–3C; prosecution history (Nov. 8, 2018 amendment and remarks distinguishing U.S. Patent No. 9,456,012 (Tanaka)); claim differentiation (dependent Claims 4 and 7)
2 | 1 | "tapered silicon waveguide having a tip width of less than 200 nanometers" | Plain and ordinary meaning (no construction necessary) | '567 Patent, col. 3, ll. 40–55; Table 1, col. 6
3 | 1 | "silicon nitride waveguide layer" | Plain and ordinary meaning (no construction necessary) | '567 Patent, col. 4, ll. 1–14
No. | Claim | Disputed Term | OWS's Proposed Construction | Supporting Intrinsic Evidence
4 | 1 | "graded buffer layer having a continuously varying germanium concentration" | "a buffer layer in which the germanium concentration changes across the layer thickness" | '234 Patent, col. 3, ll. 20–45; col. 5, ll. 30–50; col. 6, ll. 5–22; Figs. 4A, 4B; prosecution history (no narrowing amendment; allowed after examiner interview on Sept. 10, 2020)
5 | 1 | "germanium absorber layer" | Plain and ordinary meaning (no construction necessary) | '234 Patent, col. 3, ll. 50–65
No. | Claim | Disputed Term | OWS's Proposed Construction | Supporting Intrinsic Evidence
6 | 1 | "integrated wavelength-division multiplexing element monolithically formed on a single silicon die" | "a WDM component fabricated as part of the same semiconductor fabrication process on a single die" | '678 Patent, col. 4, ll. 5–50; col. 5, ll. 1–20; col. 7, ll. 10–30; prosecution history (Feb. 22, 2021 amendment adding "monolithically formed"; remarks distinguishing heterogeneous integration approaches for WDM element specifically); claim differentiation (dependent Claim 6)
7 | 1 | "multi-channel optical transceiver" | Plain and ordinary meaning (no construction necessary) | '678 Patent, col. 2, ll. 45–60
8 | 1 | "single silicon die" | Plain and ordinary meaning (no construction necessary) | '678 Patent, col. 4, ll. 5–15
No. | Claim | Disputed Term | OWS's Proposed Construction | Supporting Intrinsic Evidence
9 | 1 | "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate" | "an equalization circuit located on the same substrate as the modulator" | '890 Patent, col. 3, ll. 15–40; col. 5, ll. 1–20; col. 6, ll. 5–25; col. 7, ll. 10–30; prosecution history (Dec. 3, 2021 amendment and remarks stating co-integration includes monolithic, flip-chip, and interposer approaches); claim differentiation (dependent Claims 5 and 8)
10 | 1 | "Mach-Zehnder modulator" | Plain and ordinary meaning (no construction necessary) | '890 Patent, col. 2, ll. 30–45

UNITED STATES DISTRICT COURT NORTHERN DISTRICT OF CALIFORNIA SAN JOSE DIVISION

OPTIWAVE SEMICONDUCTOR CORP.,

LUMOS PHOTONICS, INC.,

I. INTRODUCTION

II. LEGAL STANDARD FOR CLAIM CONSTRUCTION

III. IDENTIFICATION OF ASSERTED CLAIMS

IV. CLAIM TERMS REQUIRING CONSTRUCTION AND OWS'S PROPOSED CONSTRUCTIONS

V. EXTRINSIC EVIDENCE TO BE RELIED UPON

VI. CLAIM CHARTS

VII. RESERVATION OF RIGHTS

VIII. CERTIFICATE OF SERVICE

CALDERWOOD & HARKNESS LLP

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