1014-00003 · Optiwave Semiconductor Corp · Post-Markman Assessment

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PRIVILEGED AND CONFIDENTIAL — ATTORNEY WORK PRODUCT

CALDERWOOD & HARKNESS LLP One Embarcadero Center, 34th Floor San Francisco, California 94111 Telephone: (415) 555-7200 Facsimile: (415) 555-7201

February 23, 2023

MEMORANDUM

PRIVILEGE DESIGNATION: This memorandum constitutes attorney work product prepared in anticipation of litigation and is protected from disclosure under Federal Rule of Civil Procedure 26(b)(3) and the work product doctrine. This memorandum contains the mental impressions, conclusions, opinions, and legal theories of counsel. It is intended solely for the use of attorneys and authorized personnel of Calderwood & Harkness LLP and the client, Optiwave Semiconductor Corp. ("OWS" or "Plaintiff"), in connection with the above-captioned litigation. No portion of this memorandum may be disclosed to any third party without the express written consent of the undersigned.

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I. Executive Summary

This memorandum assesses the viability of Optiwave Semiconductor Corp.'s ("OWS") infringement theories with respect to U.S. Patent No. 11,312,890 (the "'890 Patent") following the Markman Order issued on February 17, 2023, by the Honorable Edward J. Torvelis, United States District Judge for the Northern District of California. The '890 Patent, titled "Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators," was filed on November 15, 2018, and issued on April 26, 2022. The named inventors are Dr. Kevin Fong and Rajesh Iyer, both employees of OWS.

OWS asserts Claims 1, 5, 8, and 13 of the '890 Patent against two accused products manufactured and sold by Lumos Photonics, Inc. ("Lumos" or "Defendant"): the LumosBridge™ 800G Optical Engine and the LumosEdge™ 400ZR+ Pluggable Transceiver.

The central dispute in claim construction turned on the meaning of the term "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate," which appears in independent Claims 1 and 13 and flows through to dependent Claims 5 and 8. OWS proposed that this term be construed as "an equalization circuit located on the same substrate as the modulator." Lumos proposed a significantly narrower construction: "an equalization circuit fabricated in the same semiconductor process as the modulator, sharing the same doping profiles and process layers, and electrically connected without bond wires, interposers, or package-level routing." The Court adopted Defendant's proposed construction in full.

Overall Assessment: The Court's narrow construction of "co-integrated" effectively excludes Lumos's accused architecture across all four asserted claims. As established through discovery, Lumos employs a separate CMOS driver die that is flip-chip bonded to a silicon photonic modulator die via copper pillar micro-bumps. The driver die is fabricated in a standard CMOS process at a separate foundry, distinct from the silicon photonics process used for the modulator die. The two dies have different doping profiles, different process layers, and are electrically connected through copper pillar micro-bumps — a form of package-level routing. This architecture clearly falls outside the Court's construction on every sub-element. Some doctrine-of-equivalents ("DOE") arguments remain theoretically articulable but are weak, both on the merits of the function-way-result analysis and due to prosecution history estoppel arising from the narrowing amendment that introduced the "co-integrated" limitation during prosecution.

Recommendation: Infringement theories under the '890 Patent are significantly weakened by the Markman Order. This patent fares slightly better than the companion asserted patents — namely, U.S. Patent Nos. 10,455,567 (the "'567 Patent"), 10,678,234 (the "'234 Patent"), and 11,098,678 (the "'678 Patent") — because a residual DOE argument can be articulated for the '890 Patent, albeit with a low estimated probability of success (less than 5-10%). However, the '890 Patent alone cannot sustain the litigation, and the marginal DOE theory does not meaningfully alter the overall recommendation to pursue settlement discussions. This assessment should be read in conjunction with the companion analyses for the other three asserted patents and the consolidated Post-Markman Impact Assessment Memorandum dated February 21, 2023.

II. Background

A. The '890 Patent — Overview

U.S. Patent No. 11,312,890, titled "Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators," is directed to integrated driver circuit architectures that provide pre-emphasis equalization for high-speed Mach-Zehnder modulators ("MZMs") in silicon photonics platforms. The patent was filed on November 15, 2018, as U.S. Application No. 16/192,437, and issued on April 26, 2022. The named inventors are Dr. Kevin Fong, who serves as Chief Technology Officer of OWS, and Rajesh Iyer, a circuit designer at OWS.

The core innovation disclosed and claimed in the '890 Patent is the co-integration of pre-emphasis equalization circuitry with the Mach-Zehnder modulator on a single semiconductor substrate. The specification explains at length that prior-art approaches to driving silicon photonic MZMs typically employed discrete driver dies fabricated in standard CMOS processes, which were then wire-bonded or otherwise connected to the silicon photonic modulator die through interposers, bond wires, or package-level routing. See '890 Patent, col. 2, ll. 14-42. The specification identifies these inter-die connections as a significant source of parasitic inductance and capacitance, which degrades signal integrity at high data rates (e.g., 100 Gbaud per lane and above) and limits the effectiveness of pre-emphasis equalization, because the equalized signal is distorted by the parasitic elements of the interconnect before reaching the modulator. See id. at col. 2, ll. 43-61.

The '890 Patent addresses this problem by disclosing an architecture in which the pre-emphasis equalization circuitry is monolithically co-integrated with the MZM on the same silicon-on-insulator ("SOI") substrate, using a common semiconductor process. This eliminates the parasitic losses associated with wire-bond or interposer connections between discrete driver and modulator dies. See '890 Patent, col. 3, ll. 5-28. The specification describes detailed embodiments in which the driver circuitry and the modulator are fabricated in the same process flow, share the same doping profiles and metal interconnect layers, and are electrically connected through on-die metallization rather than any form of package-level interconnect. See id. at col. 5, ll. 12-48; col. 8, ll. 3-37; Figs. 2A-2C, 4.

OWS implements the approach disclosed in the '890 Patent in its commercial products, specifically the OWS-400ZR and OWS-800LR coherent optical transceiver chipsets. These chipsets are manufactured by Pinnacle Semiconductor Foundry Co., Ltd. on a 45nm SOI process that monolithically integrates CMOS driver circuitry with silicon photonic modulator structures on a single die. OWS's products thus practice the co-integration approach that is the subject of the '890 Patent.

B. Prosecution History of the '890 Patent

The application that matured into the '890 Patent was filed on November 15, 2018. During prosecution before the United States Patent and Trademark Office, the application underwent two office action rejections before the claims were allowed.

The first Office Action, a non-final rejection dated June 12, 2019, rejected the original claims under 35 U.S.C. § 102(a)(1) based on U.S. Patent No. 9,804,475 to Chen et al. ("Chen"), which disclosed a driver circuit for a silicon photonic modulator. OWS responded on September 12, 2019, by amending the independent claims to add specificity regarding the pre-emphasis equalization topology and arguing that Chen did not disclose pre-emphasis equalization.

The second Office Action, a final rejection dated January 8, 2020, rejected the amended claims under 35 U.S.C. § 103 as obvious over Chen in view of Iyer & Patel, "Co-Design of Modulator Drivers and Silicon Photonic Mach-Zehnder Structures," IEEE Transactions on Circuits and Systems, Vol. 65, No. 8, pp. 2701-2713 (2018) (the "Iyer & Patel reference"). The Iyer & Patel reference, authored by two researchers at a university laboratory, described the co-design — but not the co-integration — of modulator drivers and silicon photonic MZM structures. Specifically, Iyer & Patel disclosed driver circuits optimized for use with silicon photonic MZMs but contemplated the driver and modulator as separately fabricated components that would be assembled together in a multi-chip module.

In response to the final rejection, OWS filed a Request for Continued Examination ("RCE") on April 15, 2020, accompanied by a further amendment to the independent claims. Critically, this amendment added the limitation "electrically co-integrated with the modulator on a common substrate" to both Claim 1 and Claim 13 (the independent claims). The accompanying remarks, authored by OWS's prosecution counsel at Whitmore & Hale LLP, stated in pertinent part:

"The present invention is distinguished from the Iyer & Patel reference in that the claimed pre-emphasis equalization stage is electrically co-integrated with the modulator on a common substrate. Unlike the Iyer & Patel approach, which contemplates separately fabricated driver and modulator components that are assembled together in a multi-chip module configuration, Applicants' claimed invention is directed to monolithic co-integration of the equalization circuitry and the modulator on a single substrate. This monolithic co-integration eliminates the parasitic losses inherent in multi-chip module approaches where discrete driver and modulator dies are bonded together through wire bonds, interposers, or other package-level interconnects."

(Applicant's Remarks dated April 15, 2020, at 8-9 (emphasis in original).)

This prosecution history amendment is significant for several reasons. First, it reflects a deliberate narrowing of the claims to overcome a prior art rejection based on separately fabricated driver and modulator components. Second, the applicant's remarks explicitly distinguished multi-chip module approaches and identified monolithic co-integration as the distinguishing feature of the invention. Third, the remarks specifically identified wire bonds, interposers, and "other package-level interconnects" as the types of connections associated with the prior art that the amendment was intended to overcome. As discussed in Section V below, this amendment creates prosecution history estoppel that substantially bars the application of the doctrine of equivalents to encompass Lumos's flip-chip bonded architecture.

Following the RCE and amendment, the Examiner issued a Notice of Allowance on October 22, 2021. The patent issued on April 26, 2022, with 15 claims, of which Claims 1, 5, 8, and 13 are asserted in this litigation.

C. The Accused Lumos Products

OWS accuses two Lumos products of infringing the '890 Patent:

LumosBridge™ 800G Optical Engine. The LumosBridge 800G is a co-packaged optics engine designed for hyperscale data center switches. It integrates optical transmit and receive functionality in a single package that is directly mounted on the switch ASIC substrate. Lumos first shipped the LumosBridge 800G commercially in Q1 2022. Based on Lumos's production records produced in discovery (Bates Nos. LPI-00024567 through LPI-00024891), the unit price for the LumosBridge 800G ranges from approximately $1,200 to $1,800, depending on the configuration and customer volume.

LumosEdge™ 400ZR+ Pluggable Transceiver. The LumosEdge 400ZR+ is a QSFP-DD form factor pluggable transceiver designed for metro and data center interconnect ("DCI") applications. It has been in production since Q3 2021. Based on Lumos's sales data (Bates Nos. LPI-00031204 through LPI-00031556), the unit price for the LumosEdge 400ZR+ ranges from approximately $600 to $900.

Combined accused product revenue for calendar year 2022 was approximately $148.6 million, as reflected in Lumos's financial records produced in discovery (Bates Nos. LPI-00042100 through LPI-00042389).

Lumos's Driver Architecture. As established through discovery — including Lumos's technical documentation (Bates Nos. LPI-00008123 through LPI-00008467), the deposition testimony of Lumos's lead design engineer, Dr. Mei-Lin Chow (Chow Dep. Tr. at 87:14-92:8, 105:3-112:21), and the inspection of accused product samples conducted by OWS's technical expert, Dr. Harold Whitfield of Whitfield Technical Consulting Group, Inc. — both accused products employ the following driver architecture:

Lumos uses a separate CMOS driver die that is flip-chip bonded to a silicon photonic modulator die via copper pillar micro-bumps. The driver die is fabricated in a standard 16nm FinFET CMOS process at a separate foundry (believed to be Taiwan-based, though Lumos has designated the specific foundry identity as Highly Confidential — Attorneys' Eyes Only under the Stipulated Protective Order). The modulator die is fabricated in a silicon photonics process at a different foundry. The two dies have fundamentally different doping profiles — the CMOS driver die uses standard n-well/p-well doping profiles characteristic of FinFET CMOS logic processes, while the silicon photonic modulator die uses PN junction depletion-mode doping profiles optimized for electro-optic modulation in silicon waveguides. The process layers are also different: the CMOS driver die has a standard CMOS back-end-of-line ("BEOL") metal stack, while the modulator die has specialized silicon photonics waveguide layers and a different metallization scheme. The two dies are electrically connected through copper pillar micro-bumps, which constitute a form of package-level routing. The micro-bump pitch is approximately 40-55 μm, as determined by Dr. Whitfield's cross-sectional analysis.

This architecture is a form of 2.5D heterogeneous integration, sometimes referred to in the industry as a "flip-chip on photonic interposer" or "driver-on-PIC" assembly. It is fundamentally distinct from the monolithic co-integration approach disclosed and claimed in the '890 Patent.

D. The Markman Order — Construction of "Co-Integrated"

The Markman hearing was held on January 30, 2023, before Judge Torvelis. The hearing lasted approximately 6.5 hours and addressed the construction of 11 disputed claim terms across the four asserted patents. Both sides presented live tutorial testimony from technical consultants: OWS presented Dr. Harold Whitfield of Whitfield Technical Consulting Group, Inc., and Lumos presented Dr. Raymond Ng, Of Counsel and Technical Consultant at Brannick Howell & Stein LLP, Lumos's litigation counsel.

The Markman Order was issued on February 17, 2023, in a 34-page written opinion. The overall results were unfavorable to OWS. The Court adopted Defendant's proposed construction (or a construction substantially aligned with Defendant's position) on 8 of the 11 disputed terms, adopted Plaintiff's construction on 2 terms, and adopted a modified construction on 1 term. The two terms construed in OWS's favor related to non-critical limitations that do not meaningfully advance OWS's infringement theories.

For the '890 Patent, the sole key disputed term was "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate." The parties' competing constructions and the Court's ruling are summarized below:

The Court's reasoning, set forth at pages 18-24 of the Markman Order, addressed several points:

First, the Court found that the intrinsic evidence — particularly the specification — consistently described "co-integration" in the context of monolithic fabrication on a single substrate using a common semiconductor process. The specification's detailed embodiments all involved a single process flow producing both the driver circuitry and the modulator structures on the same die. See Markman Order at 19-20.

Second, the Court credited Lumos's argument that the prosecution history, particularly the April 15, 2020 amendment adding the "co-integrated" limitation, was specifically intended to distinguish multi-chip approaches in which separately fabricated driver and modulator dies are assembled together. The Court found that the applicant's remarks during prosecution were "unambiguous" in identifying monolithic co-integration as the distinguishing characteristic and in contrasting it with multi-chip module configurations. See Markman Order at 20-22.

Third, the Court relied on Dr. Raymond Ng's technical tutorial testimony regarding the industry understanding of the term "co-integrated." Dr. Ng testified that, in the silicon photonics field, "co-integration" is a term of art that denotes monolithic fabrication of electronic and photonic components in a common semiconductor process, as distinguished from "heterogeneous integration" or "hybrid integration" approaches that involve assembling separately fabricated dies. The Court found Dr. Ng's testimony persuasive and consistent with the intrinsic evidence. See Markman Order at 22-23.

Fourth, the Court found that OWS's broader construction — "located on the same substrate" — would render the term "co-integrated" surplusage. The Court reasoned that merely placing two components "on the same substrate" could encompass heterogeneous bonding of separately fabricated dies onto a common carrier substrate, which would not require the use of the word "co-integrated." If the patentee had intended such a broad meaning, the claim could simply have recited an equalization stage "on the same substrate as the modulator" without the "co-integrated" qualifier. The Court concluded that the "co-integrated" language must carry independent meaning beyond mere physical co-location. See Markman Order at 23-24.

The Court's construction is, in all material respects, the narrowest reasonable construction that the claim language can bear. It imposes four specific requirements on the "co-integrated" limitation: (1) fabrication in the same semiconductor process as the modulator; (2) sharing the same doping profiles; (3) sharing the same process layers; and (4) electrical connection without bond wires, interposers, or package-level routing. As detailed in Section III below, Lumos's accused architecture fails every one of these sub-requirements.

III. Claim-by-Claim Literal Infringement Analysis Under the Court's Construction

This section provides a detailed element-by-element analysis of each of the four asserted claims under the Court's construction. The analysis demonstrates that literal infringement is not viable for any of the asserted claims because Lumos's accused architecture fails the "co-integrated" limitation in every material respect.

A. Claim 1 (Independent)

Claim 1 of the '890 Patent provides:

1. A driver circuit architecture for a silicon photonic Mach-Zehnder modulator, comprising:

(a) a differential signal input stage configured to receive a differential electrical data signal;

(b) a pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate, the pre-emphasis equalization stage configured to apply frequency-dependent gain adjustment to compensate for bandwidth limitations of the modulator;

(c) a high-swing output driver stage configured to generate a differential drive signal of sufficient voltage swing to modulate the Mach-Zehnder modulator between a first optical output state and a second optical output state; and

(d) an impedance matching network disposed between the output driver stage and the modulator electrodes, wherein the impedance matching network is co-integrated on the common substrate.

Claim 1 is an independent apparatus claim directed to a driver circuit architecture comprising four principal elements: (a) a differential signal input stage, (b) a pre-emphasis equalization stage that is "electrically co-integrated with the modulator on a common substrate," (c) a high-swing output driver stage, and (d) a co-integrated impedance matching network. The critical limitation for purposes of the infringement analysis is element (b), which contains the disputed "co-integrated" term.

Element-by-Element Mapping Under the Court's Construction:

Element 1(a): "a differential signal input stage configured to receive a differential electrical data signal." Lumos's accused driver die includes a differential signal input stage that receives a differential electrical data signal from the upstream digital signal processing ("DSP") ASIC. This is confirmed by Dr. Chow's deposition testimony (Chow Dep. Tr. at 89:4-17) and Lumos's design documentation (Bates Nos. LPI-00008201 through LPI-00008215). This element is met.

Element 1(b): "a pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate, the pre-emphasis equalization stage configured to apply frequency-dependent gain adjustment to compensate for bandwidth limitations of the modulator."

This element contains two components: (i) the functional requirement that the pre-emphasis equalization stage apply frequency-dependent gain adjustment to compensate for bandwidth limitations of the modulator, and (ii) the structural requirement that the pre-emphasis equalization stage be "electrically co-integrated with the modulator on a common substrate."

As to the functional component (i), Lumos's driver die does contain pre-emphasis equalization circuitry that applies frequency-dependent gain adjustment to compensate for the bandwidth limitations of the silicon photonic MZM. Dr. Whitfield's analysis of the accused products, based on both design documentation and physical inspection, confirms that Lumos's driver implements a multi-tap FIR-based pre-emphasis equalizer that boosts high-frequency components of the drive signal to counteract the roll-off characteristics of the MZM. See Whitfield Expert Report, ¶¶ 87-95. The functional component of this element is met.

As to the structural component (ii), under the Court's construction, "electrically co-integrated with the modulator on a common substrate" requires: (1) fabrication in the same semiconductor process as the modulator; (2) sharing the same doping profiles and process layers; and (3) electrical connection without bond wires, interposers, or package-level routing. Lumos's architecture fails each of these sub-requirements:

Sub-element (1): Fabrication in the same semiconductor process as the modulator. Lumos's driver die is fabricated in a standard 16nm FinFET CMOS process at a separate foundry. The modulator die is fabricated in a silicon photonics process at a different foundry. These are two distinct semiconductor processes — one optimized for high-performance CMOS logic, the other optimized for silicon photonic waveguides and electro-optic modulators. The process flows, lithographic masks, implant recipes, and deposition steps are fundamentally different. This sub-element is not met.

Sub-element (2): Sharing the same doping profiles and process layers. The CMOS driver die and the silicon photonic modulator die have fundamentally different doping profiles. The CMOS driver die utilizes standard n-well and p-well doping profiles characteristic of FinFET CMOS logic processes, including halo implants, source/drain extensions, and lightly-doped drain ("LDD") structures. The silicon photonic modulator die utilizes PN junction depletion-mode doping profiles optimized for electro-optic phase shifting in silicon rib waveguides, with lateral PN junctions formed by selective implantation of p-type and n-type dopants into the waveguide slab regions. These doping profiles are entirely different in their purpose, concentration levels, junction depths, and spatial configurations. Similarly, the process layers differ: the CMOS die has a standard CMOS back-end-of-line metal stack (typically 10+ metal layers in a 16nm FinFET process), while the modulator die has specialized silicon photonics layers including buried oxide, silicon device layer, waveguide cladding, and a different (typically fewer) number of metallization layers. This sub-element is not met.

Sub-element (3): Electrical connection without bond wires, interposers, or package-level routing. The two dies are electrically connected through copper pillar micro-bumps with a pitch of approximately 40-55 μm. These copper pillar micro-bumps constitute package-level routing — they are an inter-die interconnect mechanism used to bond separately fabricated dies together in a package or module. The micro-bumps introduce parasitic inductance (estimated by Dr. Whitfield at approximately 15-25 pH per bump) and capacitance (approximately 10-20 fF per bump), which, while relatively low compared to wire bonds, are nonetheless non-zero and arise specifically because of the package-level interconnect. This sub-element is not met.

Additionally, the phrase "on a common substrate" independently requires that the driver and modulator reside on the same physical substrate. In Lumos's architecture, the driver and modulator are on separate dies — separate silicon substrates — that are subsequently bonded together via the copper pillar micro-bumps. Under any reasonable reading of "common substrate" in the context of the specification's description of monolithic co-integration, the Lumos architecture does not place the driver and modulator on a "common substrate." Rather, the two components are fabricated on separate substrates and assembled together. This requirement is not met.

Element 1(c): "a high-swing output driver stage configured to generate a differential drive signal of sufficient voltage swing to modulate the Mach-Zehnder modulator between a first optical output state and a second optical output state." Lumos's driver die includes an output driver stage that generates a differential drive signal with sufficient voltage swing (approximately 2.0-2.5 Vpp differential) to modulate the MZM between optical states. This is confirmed by the accused product specifications (Bates Nos. LPI-00008230 through LPI-00008245) and Dr. Whitfield's measurements. This element is met.

Element 1(d): "an impedance matching network disposed between the output driver stage and the modulator electrodes, wherein the impedance matching network is co-integrated on the common substrate." This element requires a co-integrated impedance matching network. While Lumos's driver die does include impedance matching circuitry at its output, this circuitry is on the driver die, not co-integrated with the modulator on a common substrate in the sense required by the Court's construction. The impedance matching is performed partially on the driver die and partially through the micro-bump interconnect structure, not through on-die metallization on a monolithically integrated common substrate. This element is not met, for the same reasons the "co-integrated" limitation in element 1(b) is not met.

Conclusion on Claim 1: Literal infringement of Claim 1 is not viable. Three of the four sub-requirements of the "co-integrated" limitation in element 1(b) are independently not met, and element 1(d) is likewise not met for the same reasons. The non-co-integrated elements of Claim 1 — elements 1(a) and 1(c) — are met by Lumos's accused products, but the failure of the "co-integrated" limitation is dispositive.

B. Claim 5 (Dependent on Claim 1)

Claim 5 of the '890 Patent provides:

5. The driver circuit architecture of claim 1, wherein the pre-emphasis equalization stage comprises a finite impulse response filter having at least three taps, each tap weighted to compensate for a respective frequency-dependent loss characteristic of the modulator.

Claim 5 depends from Claim 1 and adds a further limitation specifying the topology of the pre-emphasis equalization stage. Specifically, Claim 5 requires that the equalization stage comprise a finite impulse response ("FIR") filter with at least three taps, each weighted to compensate for a respective frequency-dependent loss characteristic of the modulator.

As a threshold matter, because Claim 5 depends from Claim 1, it necessarily incorporates all limitations of Claim 1, including the "co-integrated" limitation. Since Claim 1 is not literally infringed under the Court's construction, as set forth in Section III.A above, Claim 5 necessarily cannot be literally infringed.

For completeness, we note that even if the Claim 1 limitations were satisfied, the additional limitation introduced by Claim 5 would likely be met by Lumos's accused products. Dr. Whitfield's analysis indicates that Lumos's driver implements a 4-tap FIR-based pre-emphasis equalizer, with each tap weight programmable to compensate for the MZM's frequency-dependent electro-optic response. See Whitfield Expert Report, ¶¶ 93-95; see also Chow Dep. Tr. at 107:9-108:14 (confirming that the equalizer is "a programmable FIR filter with multiple taps"). This satisfies the "at least three taps" requirement and the functional limitation regarding frequency-dependent loss compensation. However, this observation is academic given the failure on the Claim 1 "co-integrated" limitation.

Conclusion on Claim 5: Literal infringement is not viable. Claim 5 fails on the Claim 1 "co-integrated" limitation that it incorporates by dependency.

C. Claim 8 (Dependent on Claim 1)

Claim 8 of the '890 Patent provides:

8. The driver circuit architecture of claim 1, wherein the modulator operates at a symbol rate of at least 100 Gbaud per lane, and wherein the co-integrated pre-emphasis equalization stage maintains signal integrity sufficient to achieve a target bit error rate of less than 1 × 10⁻² prior to forward error correction at the symbol rate.

Claim 8 depends from Claim 1 and adds a performance limitation requiring that the modulator operate at a symbol rate of at least 100 Gbaud per lane and that the co-integrated pre-emphasis equalization stage maintain signal integrity at that data rate sufficient to achieve a target bit error rate ("BER") of less than 1 × 10⁻² prior to forward error correction ("FEC").

Again, because Claim 8 depends from Claim 1, it incorporates all of Claim 1's limitations, including the "co-integrated" limitation. The failure of the "co-integrated" limitation as applied to Lumos's architecture, detailed in Section III.A above, is dispositive.

For completeness, the additional limitation introduced by Claim 8 would likely be met by Lumos's accused products if the threshold Claim 1 issue were resolved in OWS's favor. The LumosBridge 800G Optical Engine operates at data rates of approximately 100 Gbaud per lane (8 × 100G PAM4 lanes for 800G aggregate), and Lumos's product specifications indicate that the system achieves a pre-FEC BER well below the 1 × 10⁻² threshold specified in Claim 8. See Bates Nos. LPI-00008267 through LPI-00008273 (LumosBridge 800G performance specifications); see also Whitfield Expert Report, ¶¶ 101-104. The LumosEdge 400ZR+ operates at lower data rates per lane but employs coherent modulation at rates that may also satisfy the 100 Gbaud threshold depending on the interpretation of "per lane." However, as with Claim 5, this analysis is academic.

Conclusion on Claim 8: Literal infringement is not viable. Claim 8 fails on the Claim 1 "co-integrated" limitation that it incorporates by dependency.

D. Claim 13 (Independent)

Claim 13 of the '890 Patent provides:

13. A method of driving a silicon photonic Mach-Zehnder modulator, comprising:

(a) receiving a differential electrical data signal at an input stage of a driver circuit;

(b) applying pre-emphasis equalization to the differential electrical data signal using an equalization stage co-integrated with the modulator on a common substrate, wherein the pre-emphasis equalization compensates for frequency-dependent bandwidth limitations of the modulator;

(d) applying the high-swing differential drive signal to electrodes of the Mach-Zehnder modulator to modulate an optical carrier signal.

Claim 13 is a separate independent claim directed to a method of driving a silicon photonic MZM. It recites four method steps: (a) receiving a differential electrical data signal, (b) applying pre-emphasis equalization using an equalization stage "co-integrated with the modulator on a common substrate," (c) amplifying the equalized signal, and (d) applying the amplified signal to modulate the MZM.

The critical limitation is step 13(b), which contains the "co-integrated" term in essentially the same context as Claim 1, element 1(b). The Court's construction applies equally to the use of "co-integrated" in Claim 13.

Element-by-Element Mapping:

Step 13(a): "receiving a differential electrical data signal at an input stage of a driver circuit." Lumos's accused products perform this step. The driver die receives a differential electrical data signal from the DSP ASIC via its input stage. This step is met.

Step 13(b): "applying pre-emphasis equalization to the differential electrical data signal using an equalization stage co-integrated with the modulator on a common substrate, wherein the pre-emphasis equalization compensates for frequency-dependent bandwidth limitations of the modulator." The same analysis set forth in Section III.A with respect to Claim 1, element 1(b) applies here. Lumos's driver die performs pre-emphasis equalization, but the equalization stage is not "co-integrated with the modulator on a common substrate" under the Court's construction. The driver and modulator are fabricated in different semiconductor processes, have different doping profiles and process layers, and are electrically connected via copper pillar micro-bumps (package-level routing). This step is not met.

Step 13(c): "amplifying the equalized differential signal to generate a high-swing differential drive signal." Lumos's driver die amplifies the equalized signal to generate a high-swing differential drive signal. This step is met.

Step 13(d): "applying the high-swing differential drive signal to electrodes of the Mach-Zehnder modulator to modulate an optical carrier signal." Lumos's accused products apply the drive signal to the MZM electrodes to modulate an optical carrier. This step is met.

Conclusion on Claim 13: Literal infringement is not viable under the Court's construction. Claim 13 fails on the "co-integrated" limitation in step 13(b), for the same reasons that Claim 1 fails on element 1(b).

E. Summary Table — Literal Infringement

The following table summarizes the literal infringement analysis for all four asserted claims:

As shown, all four asserted claims fail on the "co-integrated" limitation under the Court's construction. The "co-integrated" limitation is the sole basis for non-infringement across all claims; the remaining claim elements — relating to the functional characteristics of the pre-emphasis equalization, the output driver stage, the impedance matching network, and the method steps of receiving, equalizing, amplifying, and applying the drive signal — are generally met by the Lumos accused products. However, this is of no consequence because every asserted claim requires the "co-integrated" limitation, and the failure of that single limitation is dispositive.

IV. Doctrine of Equivalents Analysis

A. Framework

Where literal infringement cannot be established, a patentee may alternatively seek to prove infringement under the doctrine of equivalents ("DOE"). Under this doctrine, infringement may be found if the accused product or method contains elements that are not literally within the scope of the claim but are equivalent to the claimed elements. The Supreme Court's formulation in Warner-Jenkinson Co. v. Harborline Enterprises Davis Chemical Co., 520 U.S. 17 (1997), requires that the DOE analysis proceed on a limitation-by-limitation basis, not on the invention as a whole.

The Federal Circuit applies two alternative tests for equivalence. Under the "function-way-result" test, an element of the accused product is equivalent to a claimed element if it performs substantially the same function, in substantially the same way, to achieve substantially the same result as the claimed element. Under the "insubstantial differences" test, infringement under DOE is established if the differences between the claimed element and the accused element are insubstantial. These tests are complementary and often considered together.

Importantly, DOE is subject to several legal limitations, including prosecution history estoppel (addressed separately in Section V), the all-limitations rule (DOE cannot be applied in a manner that effectively eliminates a claim limitation), and the public dedication rule (the patentee may not recapture through DOE subject matter disclosed but not claimed).

B. Application of DOE to the "Co-Integrated" Limitation

The sole limitation at issue for DOE purposes is the "co-integrated" limitation. The remaining claim elements are literally met by Lumos's accused products and need not be analyzed under DOE. The question, therefore, is whether Lumos's flip-chip bonded architecture — in which a separate CMOS driver die is bonded to the silicon photonic modulator die via copper pillar micro-bumps — is equivalent to the claimed monolithic co-integration under the function-way-result test.

Function. The function of the co-integrated equalization stage, as claimed in the '890 Patent, is to provide pre-emphasis equalization to the modulator drive signal with minimal parasitic losses and signal degradation, thereby enabling high-speed modulation at data rates where parasitic effects of inter-die connections would otherwise impair signal integrity.

Lumos's flip-chip bonded driver performs a substantially similar function: it provides pre-emphasis equalization to the modulator drive signal and is engineered to minimize parasitic losses at the target data rates. However, the copper pillar micro-bump connection inherently introduces some parasitic inductance and capacitance — approximately 15-25 pH and 10-20 fF per bump, as noted above — that is absent in a monolithically co-integrated architecture. Lumos has engineered the micro-bump interconnect to minimize these parasitics (e.g., through careful bump pitch selection, underfill optimization, and co-design of the driver output impedance with the micro-bump parasitics), and the resulting parasitics are significantly lower than those of wire-bond connections. Nevertheless, they are non-zero and represent a fundamental difference from monolithic co-integration.

On balance, the function prong is arguably met at a high level of abstraction — both approaches provide pre-emphasis equalization with reduced (though not eliminated) parasitic losses. However, if the function is defined more precisely to include "elimination" of inter-die parasitic losses (as the specification contemplates), then Lumos's flip-chip approach does not perform the identical function.

Way. The claimed "way" of achieving the function is monolithic co-integration: fabrication of the equalization circuitry and the modulator in the same semiconductor process, sharing the same doping profiles and process layers, with direct electrical connection through on-die metallization. This approach eliminates inter-die interconnects entirely and leverages the precision of lithographic patterning to achieve sub-micron alignment between driver and modulator structures.

Lumos's "way" is fundamentally different: heterogeneous flip-chip assembly. The driver and modulator are fabricated in entirely separate semiconductor processes at different foundries, producing dies with different doping profiles, different process layers, and different substrates. These dies are then assembled together by flip-chip bonding through copper pillar micro-bumps — a package-level assembly process that involves solder reflow, underfill dispensing, and post-bonding curing. The alignment precision of flip-chip bonding (on the order of ±1-3 μm) is orders of magnitude coarser than on-die lithographic alignment (sub-10 nm). The interconnect mechanism — copper pillar micro-bumps — is a form of package-level routing that introduces parasitic elements absent in on-die metallization.

These are fundamentally different approaches to achieving driver-modulator integration. The silicon photonics industry recognizes monolithic co-integration and heterogeneous flip-chip integration as distinct integration paradigms with different tradeoffs, different design constraints, and different supply chain implications. See, e.g., Dr. Ng's Markman tutorial testimony (cited by the Court); see also the '890 Patent specification at col. 2, ll. 14-42 (identifying multi-chip module approaches as the prior art problem). The specification specifically distinguishes multi-chip approaches — including those using "interposers or other package-level interconnects" — and identifies monolithic co-integration as the inventive advance that overcomes the limitations of those approaches.

The "way" prong is not met. The difference between monolithic co-integration and heterogeneous flip-chip bonding is a substantial difference, not an insubstantial one. This is the fundamental weakness of the DOE theory.

Result. Both approaches achieve the broad result of high-speed optical modulation with pre-emphasis equalization. At this level of abstraction, the result prong is arguably met. However, the claimed approach achieves additional specific results that Lumos's approach does not fully replicate: (i) complete elimination of inter-die parasitic losses (rather than mere reduction); (ii) the ability to leverage on-die metallization for impedance matching with nanometer-scale precision; and (iii) simplification of the manufacturing supply chain by requiring only a single semiconductor process and a single foundry. These additional result advantages are inherent to monolithic co-integration and are not achievable through flip-chip assembly.

On balance, the result prong is arguably met at a high level but is weakened by the specific result differences between the two approaches.

C. Assessment of DOE Viability

The DOE argument for the '890 Patent is theoretically articulable but weak. The primary weakness is the "way" prong: monolithic co-integration and heterogeneous flip-chip bonding are recognized in the semiconductor industry as fundamentally different integration paradigms. The patent specification itself draws this distinction as the core of the inventive contribution, treating multi-chip module approaches as the prior art problem and monolithic co-integration as the solution. A jury or court confronted with this distinction would likely find the differences between the two approaches to be substantial, not insubstantial.

Moreover, applying DOE to equate flip-chip bonding with monolithic co-integration would risk violating the all-limitations rule, because it would effectively read the "co-integrated" limitation out of the claims. Under the Court's construction, "co-integrated" requires fabrication in the same process, shared doping profiles and layers, and connection without package-level routing. A DOE finding that flip-chip bonding (different processes, different profiles, package-level routing) is equivalent would reduce the "co-integrated" limitation to a requirement of mere physical proximity — which is precisely the broad construction the Court rejected.

Additionally, as discussed in Section V below, prosecution history estoppel presents a substantial independent bar to the DOE theory.

Taking into account the weakness of the substantive DOE analysis but acknowledging that the DOE argument is at least articulable (unlike the situation with the '567, '234, and '678 Patents, where DOE is clearly barred), we estimate the probability of success on a DOE theory for the '890 Patent at less than 15% before considering prosecution history estoppel, and less than 5-10% after factoring in estoppel (as discussed in Section V).

V. Prosecution History Estoppel Analysis

A. The Amendment and Its Scope

As detailed in Section II.B above, the "co-integrated" limitation was added to the independent claims of the '890 Patent by amendment during prosecution. The amendment was made in connection with a Request for Continued Examination filed on April 15, 2020, in response to a final rejection under 35 U.S.C. § 103 based on the Iyer & Patel reference. The Iyer & Patel reference described the co-design of separately fabricated driver and modulator components in a multi-chip module configuration. The applicant added the "co-integrated with the modulator on a common substrate" limitation to distinguish the claimed invention from the multi-chip approach of Iyer & Patel.

Under Festo Corp. v. Fenmore & Co., 535 U.S. 722 (2002), a narrowing amendment made for reasons of patentability creates a rebuttable presumption that the patentee surrendered all equivalents between the original claim scope and the amended claim scope. Here, the original claims recited a generic "pre-emphasis equalization stage" without the "co-integrated" limitation. The amendment narrowed this to require co-integration with the modulator on a common substrate. The territory between the original broad scope (any equalization stage, regardless of integration approach) and the narrowed scope (only an equalization stage co-integrated with the modulator) was surrendered.

The surrendered territory plainly encompasses Lumos's flip-chip bonded architecture. Lumos uses a separately fabricated driver die that is assembled with the modulator die through package-level interconnects — precisely the type of multi-chip approach that the amendment was designed to distinguish. The applicant's prosecution remarks could not have been more explicit on this point, stating that the claimed invention is "directed to monolithic co-integration of the equalization circuitry and the modulator on a single substrate" and distinguishing "multi-chip module approaches where discrete driver and modulator dies are bonded together through wire bonds, interposers, or other package-level interconnects." (Applicant's Remarks dated April 15, 2020, at 8-9.)

B. Rebuttal of the Festo Presumption

Under Festo, the presumption of surrender can be rebutted if the patentee demonstrates that one of three exceptions applies: (1) the alleged equivalent was unforeseeable at the time of the amendment; (2) the rationale underlying the amendment bears no more than a tangential relation to the alleged equivalent; or (3) there is some other reason suggesting that the patentee could not reasonably have been expected to have described the insubstantial substitute in question.

We have analyzed each exception as applied to the present facts:

(1) Foreseeability. Under the first Festo exception, the presumption of surrender may be rebutted if the alleged equivalent was not foreseeable at the time of the narrowing amendment. Here, the amendment was filed on April 15, 2020. At that time, flip-chip bonding of driver dies to modulator dies was a well-known and widely practiced technique in the silicon photonics industry. Copper pillar micro-bump technology had been in commercial use for years, and multiple companies — including Hollowell Group, Ashbury & Co. (now Cisco), and Greaves Holdings — had publicly described or demonstrated flip-chip bonded driver-modulator assemblies. The Iyer & Patel reference itself, which the amendment was designed to overcome, contemplated multi-chip assembly approaches including flip-chip bonding. The patent specification acknowledges multi-chip approaches as part of the prior art landscape. There is no basis on which to argue that flip-chip bonding of a driver die to a modulator die was unforeseeable at the time of the amendment. This exception is not available.

(2) Tangential Relation. Under the second Festo exception, the presumption of surrender may be rebutted if the rationale for the amendment bears no more than a tangential relation to the alleged equivalent. Here, the amendment was made specifically to distinguish the claimed monolithic co-integration from multi-chip integration approaches in which separately fabricated driver and modulator dies are assembled together. Lumos's flip-chip bonded architecture is a multi-chip integration approach in which a separately fabricated driver die is assembled with a modulator die — precisely the category of prior art that the amendment was intended to overcome. The rationale for the amendment is directly, centrally, and inextricably related to the accused equivalent. This is not a case where the amendment was made for reasons unrelated to the accused equivalent (e.g., to overcome a prior art reference directed to a different aspect of the claims). This exception is not available.

(3) Other Reasons. Under the third Festo exception, the presumption of surrender may be rebutted if there is "some other reason suggesting that the patentee could not reasonably have been expected to have described the insubstantial substitute in question." This is a narrow exception, and courts have found it applicable only in unusual circumstances where, for example, the equivalent involves after-developed technology that did not exist at the time of the amendment. Here, there is no compelling basis for this exception. Flip-chip bonding with copper pillar micro-bumps was well-established technology at the time of the original filing in 2018 and at the time of the amendment in 2020. The applicant was well aware of multi-chip approaches — the specification discusses them at length — and could have drafted claims that encompassed heterogeneous integration if that was the intended scope. Indeed, the specification's detailed discussion of multi-chip approaches as prior art demonstrates that the patentee was fully familiar with these approaches and made a deliberate choice to claim only monolithic co-integration. This exception is not available.

C. Estoppel Conclusion

Prosecution history estoppel presents a strong bar to the application of DOE for the "co-integrated" limitation. The narrowing amendment adding the "co-integrated" limitation was made specifically to overcome prior art describing separately fabricated and assembled driver-modulator configurations. The surrendered territory — between a generic equalization stage and one that is monolithically co-integrated with the modulator — encompasses precisely the flip-chip bonded architecture used by Lumos. None of the three Festo exceptions are available to rebut the presumption of surrender.

This estoppel analysis independently undermines the DOE theory articulated in Section IV above. Even if a court or jury were inclined to find equivalence under the function-way-result test (which we regard as unlikely for the reasons stated in Section IV), prosecution history estoppel would bar the application of DOE to reach Lumos's flip-chip bonded architecture.

Taking the substantive DOE weakness and the prosecution history estoppel bar together, our estimated probability of prevailing on a DOE theory for the '890 Patent is less than 5-10%. This represents a marginal improvement over the companion patents (for which DOE is effectively barred entirely), but it does not represent a viable basis for continuing the litigation.

VI. Lumos's Invalidity Counterclaims — Residual Risk Assessment

Although the focus of this memorandum is on infringement viability rather than validity, we briefly address the residual invalidity risk associated with the '890 Patent because validity considerations bear on settlement leverage and overall case valuation.

A. Prior Art: Iyer & Patel (2018 IEEE Article)

The principal prior art reference cited against the '890 Patent during prosecution was Iyer & Patel, "Co-Design of Modulator Drivers and Silicon Photonic Mach-Zehnder Structures," IEEE Transactions on Circuits and Systems, Vol. 65, No. 8, pp. 2701-2713 (2018). This reference was cited in the final rejection under 35 U.S.C. § 103, in combination with U.S. Patent No. 9,804,475 to Chen et al.

The Iyer & Patel reference describes the co-design of modulator drivers and silicon photonic MZM structures but does not disclose monolithic co-integration of the driver and modulator on a common substrate. Instead, Iyer & Patel contemplates separately fabricated driver and modulator components assembled in a multi-chip module. The claims of the '890 Patent, as narrowed during prosecution to require "co-integration," were allowed over the Iyer & Patel reference specifically because of this distinction.

Under the Court's narrow construction of "co-integrated," the claims of the '890 Patent are quite narrow — they are limited to monolithic co-integration with all of the specific sub-requirements imposed by the Court's construction. This narrow scope arguably strengthens the validity of the claims against prior art challenges. A prior art reference would need to disclose not just a driver circuit for a silicon photonic MZM, but specifically one that is monolithically co-integrated with the modulator in the same semiconductor process, sharing the same doping profiles and process layers, with electrical connection through on-die metallization rather than any form of package-level routing. Such a prior art reference has not been identified.

However, this validity strength is of little practical value. The same narrow construction that makes the claims robust against invalidity challenges simultaneously renders the claims unenforceable against Lumos's accused products. This is a classic prosecution history trap: the narrowing that was necessary to obtain the patent and that now supports validity is the same narrowing that defeats infringement.

B. Section 112 Challenges

Lumos has asserted invalidity of the '890 Patent under 35 U.S.C. § 112, alleging insufficient written description and lack of enablement. We assess this risk as low under the Court's narrow construction.

Written Description. The specification of the '890 Patent provides extensive written description support for monolithic co-integration of driver circuitry with silicon photonic MZMs. The specification describes detailed embodiments in which both the driver and modulator are fabricated on a common SOI substrate in a single process flow. See '890 Patent, col. 5, ll. 12-48; col. 8, ll. 3-37; Figs. 2A-2C, 4. The specification explains the process integration, doping profiles, metal interconnect layers, and electrical connection mechanisms in detail sufficient to demonstrate that the inventors possessed the claimed invention. Under the narrow construction, the claims are directed to precisely what the specification describes in detail. Written description risk is low.

Enablement. The specification provides sufficient enabling disclosure for a person of ordinary skill in the art to practice the claimed invention without undue experimentation. The detailed process flow descriptions, circuit schematics, and simulation results in the specification would enable a skilled engineer to fabricate a monolithically co-integrated driver-modulator architecture as claimed. OWS's own commercial products (the OWS-400ZR and OWS-800LR) demonstrate that the claimed invention can be practiced. Enablement risk is low.

C. Net Invalidity Risk

The narrow construction of "co-integrated" actually reduces the invalidity risk for the '890 Patent, but this is a pyrrhic benefit. The claims are likely valid — they survive challenges under §§ 102, 103, and 112 — but they do not cover the accused products. Lumos's invalidity counterclaims, while still technically pending, present low risk. However, this favorable validity posture does not provide meaningful litigation leverage given the infringement analysis set forth above.

VII. Impact on Damages Theories

The Markman Order's impact on the damages theories for this litigation is severe. Prior to the Markman hearing, OWS's damages estimate for all four asserted patents was in excess of $75 million, based on a reasonable royalty rate of approximately 7.5% applied to Lumos's accused product revenue of approximately $148.6 million for calendar year 2022, with potential enhancement for willful infringement under 35 U.S.C. § 284.

This damages estimate was developed by OWS's damages expert, Dr. Lawrence Kessler of Apex Claim Analytics LLC, using a Georgia-Pacific factor analysis that apportioned the reasonable royalty across all four asserted patents. The apportionment recognized that each patent contributed to the overall value of the accused technology and that the combined royalty reflected the synergistic value of the patent portfolio.

If the '890 Patent were the only surviving patent — and it is, at best, a marginal survivor under a weak DOE theory — the damages analysis would require fundamental restructuring. The royalty rate would need to be re-apportioned to reflect only the value attributable to the '890 Patent standing alone, without the portfolio effect of the other three patents. Even under the most optimistic apportionment, the '890 Patent alone would support only a fraction of the original damages estimate. Based on preliminary apportionment analysis, the '890 Patent was attributed approximately 20-25% of the total royalty value, reflecting its contribution to the driver circuit architecture aspect of the accused products. This would suggest a standalone royalty estimate on the order of $15-19 million at most — but this figure assumes successful establishment of infringement, which is now in serious doubt.

Critically, the extremely low probability of prevailing on DOE (estimated at less than 5-10%) means that the expected value of the damages claim attributable to the '890 Patent is negligible. Applying a probability-weighted analysis: an estimated 5-10% probability of establishing infringement multiplied by a potential standalone damages award of $15-19 million yields an expected value of approximately $0.75-1.9 million. This expected value is likely insufficient to justify the remaining estimated litigation costs through trial, which we estimate at approximately $1.65 million (including expert fees, deposition costs, trial preparation, and trial itself).

We recommend suspending Dr. Kessler's damages analysis pending the outcome of settlement discussions, which we understand the OWS Board is expected to authorize on February 24, 2023. Continuing to invest in expert damages work on a patent with such a low probability of establishing infringement would not be a prudent use of litigation resources.

VIII. Comparison with Other Asserted Patents — Relative Strength

This section briefly cross-references the companion memoranda prepared for the other three asserted patents, to provide context for the relative strength of the '890 Patent within the overall patent portfolio asserted in this litigation.

U.S. Patent No. 10,455,567 (the "'567 Patent" — Waveguide Coupler). The '567 Patent is directed to an adiabatic waveguide coupler for silicon photonics. The key disputed term was "adiabatically coupled," which the Court construed to require a continuous, monotonically varying taper profile. Lumos's accused products employ a segmented (non-continuous) taper that uses discrete step transitions rather than a continuous profile. Under the Court's construction, Lumos's segmented taper is excluded from literal infringement, and there is no viable DOE argument because Lumos's design is a clear design-around that the specification acknowledges as an alternative but does not claim. The '567 Patent is untenable for infringement purposes. See Companion Memorandum re '567 Patent dated February 22, 2023.

U.S. Patent No. 10,678,234 (the "'234 Patent" — Germanium Photodetector). The '234 P

PRIVILEGED AND CONFIDENTIAL — ATTORNEY WORK PRODUCT
CALDERWOOD & HARKNESS LLP One Embarcadero Center, 34th Floor San Francisco, California 94111 Telephone: (415) 555-7200 Facsimile: (415) 555-7201
February 23, 2023
MEMORANDUM
PRIVILEGE DESIGNATION: This memorandum constitutes attorney work product prepared in anticipation of litigation and is protected from disclosure under Federal Rule of Civil Procedure 26(b)(3) and the work product doctrine. This memorandum contains the mental impressions, conclusions, opinions, and legal theories of counsel. It is intended solely for the use of attorneys and authorized personnel of Calderwood & Harkness LLP and the client, Optiwave Semiconductor Corp. ("OWS" or "Plaintiff"), in connection with the above-captioned litigation. No portion of this memorandum may be disclosed to any third party without the express written consent of the undersigned.
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I. Executive Summary
This memorandum assesses the viability of Optiwave Semiconductor Corp.'s ("OWS") infringement theories with respect to U.S. Patent No. 11,312,890 (the "'890 Patent") following the Markman Order issued on February 17, 2023, by the Honorable Edward J. Torvelis, United States District Judge for the Northern District of California. The '890 Patent, titled "Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators," was filed on November 15, 2018, and issued on April 26, 2022. The named inventors are Dr. Kevin Fong and Rajesh Iyer, both employees of OWS.
OWS asserts Claims 1, 5, 8, and 13 of the '890 Patent against two accused products manufactured and sold by Lumos Photonics, Inc. ("Lumos" or "Defendant"): the LumosBridge™ 800G Optical Engine and the LumosEdge™ 400ZR+ Pluggable Transceiver.
The central dispute in claim construction turned on the meaning of the term "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate," which appears in independent Claims 1 and 13 and flows through to dependent Claims 5 and 8. OWS proposed that this term be construed as "an equalization circuit located on the same substrate as the modulator." Lumos proposed a significantly narrower construction: "an equalization circuit fabricated in the same semiconductor process as the modulator, sharing the same doping profiles and process layers, and electrically connected without bond wires, interposers, or package-level routing." The Court adopted Defendant's proposed construction in full.
Overall Assessment: The Court's narrow construction of "co-integrated" effectively excludes Lumos's accused architecture across all four asserted claims. As established through discovery, Lumos employs a separate CMOS driver die that is flip-chip bonded to a silicon photonic modulator die via copper pillar micro-bumps. The driver die is fabricated in a standard CMOS process at a separate foundry, distinct from the silicon photonics process used for the modulator die. The two dies have different doping profiles, different process layers, and are electrically connected through copper pillar micro-bumps — a form of package-level routing. This architecture clearly falls outside the Court's construction on every sub-element. Some doctrine-of-equivalents ("DOE") arguments remain theoretically articulable but are weak, both on the merits of the function-way-result analysis and due to prosecution history estoppel arising from the narrowing amendment that introduced the "co-integrated" limitation during prosecution.
Recommendation: Infringement theories under the '890 Patent are significantly weakened by the Markman Order. This patent fares slightly better than the companion asserted patents — namely, U.S. Patent Nos. 10,455,567 (the "'567 Patent"), 10,678,234 (the "'234 Patent"), and 11,098,678 (the "'678 Patent") — because a residual DOE argument can be articulated for the '890 Patent, albeit with a low estimated probability of success (less than 5-10%). However, the '890 Patent alone cannot sustain the litigation, and the marginal DOE theory does not meaningfully alter the overall recommendation to pursue settlement discussions. This assessment should be read in conjunction with the companion analyses for the other three asserted patents and the consolidated Post-Markman Impact Assessment Memorandum dated February 21, 2023.
II. Background
A. The '890 Patent — Overview
U.S. Patent No. 11,312,890, titled "Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators," is directed to integrated driver circuit architectures that provide pre-emphasis equalization for high-speed Mach-Zehnder modulators ("MZMs") in silicon photonics platforms. The patent was filed on November 15, 2018, as U.S. Application No. 16/192,437, and issued on April 26, 2022. The named inventors are Dr. Kevin Fong, who serves as Chief Technology Officer of OWS, and Rajesh Iyer, a circuit designer at OWS.
The core innovation disclosed and claimed in the '890 Patent is the co-integration of pre-emphasis equalization circuitry with the Mach-Zehnder modulator on a single semiconductor substrate. The specification explains at length that prior-art approaches to driving silicon photonic MZMs typically employed discrete driver dies fabricated in standard CMOS processes, which were then wire-bonded or otherwise connected to the silicon photonic modulator die through interposers, bond wires, or package-level routing. See '890 Patent, col. 2, ll. 14-42. The specification identifies these inter-die connections as a significant source of parasitic inductance and capacitance, which degrades signal integrity at high data rates (e.g., 100 Gbaud per lane and above) and limits the effectiveness of pre-emphasis equalization, because the equalized signal is distorted by the parasitic elements of the interconnect before reaching the modulator. See id. at col. 2, ll. 43-61.
The '890 Patent addresses this problem by disclosing an architecture in which the pre-emphasis equalization circuitry is monolithically co-integrated with the MZM on the same silicon-on-insulator ("SOI") substrate, using a common semiconductor process. This eliminates the parasitic losses associated with wire-bond or interposer connections between discrete driver and modulator dies. See '890 Patent, col. 3, ll. 5-28. The specification describes detailed embodiments in which the driver circuitry and the modulator are fabricated in the same process flow, share the same doping profiles and metal interconnect layers, and are electrically connected through on-die metallization rather than any form of package-level interconnect. See id. at col. 5, ll. 12-48; col. 8, ll. 3-37; Figs. 2A-2C, 4.
OWS implements the approach disclosed in the '890 Patent in its commercial products, specifically the OWS-400ZR and OWS-800LR coherent optical transceiver chipsets. These chipsets are manufactured by Pinnacle Semiconductor Foundry Co., Ltd. on a 45nm SOI process that monolithically integrates CMOS driver circuitry with silicon photonic modulator structures on a single die. OWS's products thus practice the co-integration approach that is the subject of the '890 Patent.
B. Prosecution History of the '890 Patent
The application that matured into the '890 Patent was filed on November 15, 2018. During prosecution before the United States Patent and Trademark Office, the application underwent two office action rejections before the claims were allowed.
The first Office Action, a non-final rejection dated June 12, 2019, rejected the original claims under 35 U.S.C. § 102(a)(1) based on U.S. Patent No. 9,804,475 to Chen et al. ("Chen"), which disclosed a driver circuit for a silicon photonic modulator. OWS responded on September 12, 2019, by amending the independent claims to add specificity regarding the pre-emphasis equalization topology and arguing that Chen did not disclose pre-emphasis equalization.
The second Office Action, a final rejection dated January 8, 2020, rejected the amended claims under 35 U.S.C. § 103 as obvious over Chen in view of Iyer & Patel, "Co-Design of Modulator Drivers and Silicon Photonic Mach-Zehnder Structures," IEEE Transactions on Circuits and Systems, Vol. 65, No. 8, pp. 2701-2713 (2018) (the "Iyer & Patel reference"). The Iyer & Patel reference, authored by two researchers at a university laboratory, described the co-design — but not the co-integration — of modulator drivers and silicon photonic MZM structures. Specifically, Iyer & Patel disclosed driver circuits optimized for use with silicon photonic MZMs but contemplated the driver and modulator as separately fabricated components that would be assembled together in a multi-chip module.
In response to the final rejection, OWS filed a Request for Continued Examination ("RCE") on April 15, 2020, accompanied by a further amendment to the independent claims. Critically, this amendment added the limitation "electrically co-integrated with the modulator on a common substrate" to both Claim 1 and Claim 13 (the independent claims). The accompanying remarks, authored by OWS's prosecution counsel at Whitmore & Hale LLP, stated in pertinent part:
"The present invention is distinguished from the Iyer & Patel reference in that the claimed pre-emphasis equalization stage is electrically co-integrated with the modulator on a common substrate. Unlike the Iyer & Patel approach, which contemplates separately fabricated driver and modulator components that are assembled together in a multi-chip module configuration, Applicants' claimed invention is directed to monolithic co-integration of the equalization circuitry and the modulator on a single substrate. This monolithic co-integration eliminates the parasitic losses inherent in multi-chip module approaches where discrete driver and modulator dies are bonded together through wire bonds, interposers, or other package-level interconnects."
(Applicant's Remarks dated April 15, 2020, at 8-9 (emphasis in original).)
This prosecution history amendment is significant for several reasons. First, it reflects a deliberate narrowing of the claims to overcome a prior art rejection based on separately fabricated driver and modulator components. Second, the applicant's remarks explicitly distinguished multi-chip module approaches and identified monolithic co-integration as the distinguishing feature of the invention. Third, the remarks specifically identified wire bonds, interposers, and "other package-level interconnects" as the types of connections associated with the prior art that the amendment was intended to overcome. As discussed in Section V below, this amendment creates prosecution history estoppel that substantially bars the application of the doctrine of equivalents to encompass Lumos's flip-chip bonded architecture.
Following the RCE and amendment, the Examiner issued a Notice of Allowance on October 22, 2021. The patent issued on April 26, 2022, with 15 claims, of which Claims 1, 5, 8, and 13 are asserted in this litigation.
C. The Accused Lumos Products
OWS accuses two Lumos products of infringing the '890 Patent:
LumosBridge™ 800G Optical Engine. The LumosBridge 800G is a co-packaged optics engine designed for hyperscale data center switches. It integrates optical transmit and receive functionality in a single package that is directly mounted on the switch ASIC substrate. Lumos first shipped the LumosBridge 800G commercially in Q1 2022. Based on Lumos's production records produced in discovery (Bates Nos. LPI-00024567 through LPI-00024891), the unit price for the LumosBridge 800G ranges from approximately $1,200 to $1,800, depending on the configuration and customer volume.
LumosEdge™ 400ZR+ Pluggable Transceiver. The LumosEdge 400ZR+ is a QSFP-DD form factor pluggable transceiver designed for metro and data center interconnect ("DCI") applications. It has been in production since Q3 2021. Based on Lumos's sales data (Bates Nos. LPI-00031204 through LPI-00031556), the unit price for the LumosEdge 400ZR+ ranges from approximately $600 to $900.
Combined accused product revenue for calendar year 2022 was approximately $148.6 million, as reflected in Lumos's financial records produced in discovery (Bates Nos. LPI-00042100 through LPI-00042389).
Lumos's Driver Architecture. As established through discovery — including Lumos's technical documentation (Bates Nos. LPI-00008123 through LPI-00008467), the deposition testimony of Lumos's lead design engineer, Dr. Mei-Lin Chow (Chow Dep. Tr. at 87:14-92:8, 105:3-112:21), and the inspection of accused product samples conducted by OWS's technical expert, Dr. Harold Whitfield of Whitfield Technical Consulting Group, Inc. — both accused products employ the following driver architecture:
Lumos uses a separate CMOS driver die that is flip-chip bonded to a silicon photonic modulator die via copper pillar micro-bumps. The driver die is fabricated in a standard 16nm FinFET CMOS process at a separate foundry (believed to be Taiwan-based, though Lumos has designated the specific foundry identity as Highly Confidential — Attorneys' Eyes Only under the Stipulated Protective Order). The modulator die is fabricated in a silicon photonics process at a different foundry. The two dies have fundamentally different doping profiles — the CMOS driver die uses standard n-well/p-well doping profiles characteristic of FinFET CMOS logic processes, while the silicon photonic modulator die uses PN junction depletion-mode doping profiles optimized for electro-optic modulation in silicon waveguides. The process layers are also different: the CMOS driver die has a standard CMOS back-end-of-line ("BEOL") metal stack, while the modulator die has specialized silicon photonics waveguide layers and a different metallization scheme. The two dies are electrically connected through copper pillar micro-bumps, which constitute a form of package-level routing. The micro-bump pitch is approximately 40-55 μm, as determined by Dr. Whitfield's cross-sectional analysis.
This architecture is a form of 2.5D heterogeneous integration, sometimes referred to in the industry as a "flip-chip on photonic interposer" or "driver-on-PIC" assembly. It is fundamentally distinct from the monolithic co-integration approach disclosed and claimed in the '890 Patent.
D. The Markman Order — Construction of "Co-Integrated"
The Markman hearing was held on January 30, 2023, before Judge Torvelis. The hearing lasted approximately 6.5 hours and addressed the construction of 11 disputed claim terms across the four asserted patents. Both sides presented live tutorial testimony from technical consultants: OWS presented Dr. Harold Whitfield of Whitfield Technical Consulting Group, Inc., and Lumos presented Dr. Raymond Ng, Of Counsel and Technical Consultant at Brannick Howell & Stein LLP, Lumos's litigation counsel.
The Markman Order was issued on February 17, 2023, in a 34-page written opinion. The overall results were unfavorable to OWS. The Court adopted Defendant's proposed construction (or a construction substantially aligned with Defendant's position) on 8 of the 11 disputed terms, adopted Plaintiff's construction on 2 terms, and adopted a modified construction on 1 term. The two terms construed in OWS's favor related to non-critical limitations that do not meaningfully advance OWS's infringement theories.
For the '890 Patent, the sole key disputed term was "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate." The parties' competing constructions and the Court's ruling are summarized below:
The Court's reasoning, set forth at pages 18-24 of the Markman Order, addressed several points:
First, the Court found that the intrinsic evidence — particularly the specification — consistently described "co-integration" in the context of monolithic fabrication on a single substrate using a common semiconductor process. The specification's detailed embodiments all involved a single process flow producing both the driver circuitry and the modulator structures on the same die. See Markman Order at 19-20.
Second, the Court credited Lumos's argument that the prosecution history, particularly the April 15, 2020 amendment adding the "co-integrated" limitation, was specifically intended to distinguish multi-chip approaches in which separately fabricated driver and modulator dies are assembled together. The Court found that the applicant's remarks during prosecution were "unambiguous" in identifying monolithic co-integration as the distinguishing characteristic and in contrasting it with multi-chip module configurations. See Markman Order at 20-22.
Third, the Court relied on Dr. Raymond Ng's technical tutorial testimony regarding the industry understanding of the term "co-integrated." Dr. Ng testified that, in the silicon photonics field, "co-integration" is a term of art that denotes monolithic fabrication of electronic and photonic components in a common semiconductor process, as distinguished from "heterogeneous integration" or "hybrid integration" approaches that involve assembling separately fabricated dies. The Court found Dr. Ng's testimony persuasive and consistent with the intrinsic evidence. See Markman Order at 22-23.
Fourth, the Court found that OWS's broader construction — "located on the same substrate" — would render the term "co-integrated" surplusage. The Court reasoned that merely placing two components "on the same substrate" could encompass heterogeneous bonding of separately fabricated dies onto a common carrier substrate, which would not require the use of the word "co-integrated." If the patentee had intended such a broad meaning, the claim could simply have recited an equalization stage "on the same substrate as the modulator" without the "co-integrated" qualifier. The Court concluded that the "co-integrated" language must carry independent meaning beyond mere physical co-location. See Markman Order at 23-24.
The Court's construction is, in all material respects, the narrowest reasonable construction that the claim language can bear. It imposes four specific requirements on the "co-integrated" limitation: (1) fabrication in the same semiconductor process as the modulator; (2) sharing the same doping profiles; (3) sharing the same process layers; and (4) electrical connection without bond wires, interposers, or package-level routing. As detailed in Section III below, Lumos's accused architecture fails every one of these sub-requirements.
III. Claim-by-Claim Literal Infringement Analysis Under the Court's Construction
This section provides a detailed element-by-element analysis of each of the four asserted claims under the Court's construction. The analysis demonstrates that literal infringement is not viable for any of the asserted claims because Lumos's accused architecture fails the "co-integrated" limitation in every material respect.
A. Claim 1 (Independent)
Claim 1 of the '890 Patent provides:
1. A driver circuit architecture for a silicon photonic Mach-Zehnder modulator, comprising:
(a) a differential signal input stage configured to receive a differential electrical data signal;
(b) a pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate, the pre-emphasis equalization stage configured to apply frequency-dependent gain adjustment to compensate for bandwidth limitations of the modulator;
(c) a high-swing output driver stage configured to generate a differential drive signal of sufficient voltage swing to modulate the Mach-Zehnder modulator between a first optical output state and a second optical output state; and
(d) an impedance matching network disposed between the output driver stage and the modulator electrodes, wherein the impedance matching network is co-integrated on the common substrate.
Claim 1 is an independent apparatus claim directed to a driver circuit architecture comprising four principal elements: (a) a differential signal input stage, (b) a pre-emphasis equalization stage that is "electrically co-integrated with the modulator on a common substrate," (c) a high-swing output driver stage, and (d) a co-integrated impedance matching network. The critical limitation for purposes of the infringement analysis is element (b), which contains the disputed "co-integrated" term.
Element-by-Element Mapping Under the Court's Construction:
Element 1(a): "a differential signal input stage configured to receive a differential electrical data signal." Lumos's accused driver die includes a differential signal input stage that receives a differential electrical data signal from the upstream digital signal processing ("DSP") ASIC. This is confirmed by Dr. Chow's deposition testimony (Chow Dep. Tr. at 89:4-17) and Lumos's design documentation (Bates Nos. LPI-00008201 through LPI-00008215). This element is met.
Element 1(b): "a pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate, the pre-emphasis equalization stage configured to apply frequency-dependent gain adjustment to compensate for bandwidth limitations of the modulator."
This element contains two components: (i) the functional requirement that the pre-emphasis equalization stage apply frequency-dependent gain adjustment to compensate for bandwidth limitations of the modulator, and (ii) the structural requirement that the pre-emphasis equalization stage be "electrically co-integrated with the modulator on a common substrate."
As to the functional component (i), Lumos's driver die does contain pre-emphasis equalization circuitry that applies frequency-dependent gain adjustment to compensate for the bandwidth limitations of the silicon photonic MZM. Dr. Whitfield's analysis of the accused products, based on both design documentation and physical inspection, confirms that Lumos's driver implements a multi-tap FIR-based pre-emphasis equalizer that boosts high-frequency components of the drive signal to counteract the roll-off characteristics of the MZM. See Whitfield Expert Report, ¶¶ 87-95. The functional component of this element is met.
As to the structural component (ii), under the Court's construction, "electrically co-integrated with the modulator on a common substrate" requires: (1) fabrication in the same semiconductor process as the modulator; (2) sharing the same doping profiles and process layers; and (3) electrical connection without bond wires, interposers, or package-level routing. Lumos's architecture fails each of these sub-requirements:
Sub-element (1): Fabrication in the same semiconductor process as the modulator. Lumos's driver die is fabricated in a standard 16nm FinFET CMOS process at a separate foundry. The modulator die is fabricated in a silicon photonics process at a different foundry. These are two distinct semiconductor processes — one optimized for high-performance CMOS logic, the other optimized for silicon photonic waveguides and electro-optic modulators. The process flows, lithographic masks, implant recipes, and deposition steps are fundamentally different. This sub-element is not met.
Sub-element (2): Sharing the same doping profiles and process layers. The CMOS driver die and the silicon photonic modulator die have fundamentally different doping profiles. The CMOS driver die utilizes standard n-well and p-well doping profiles characteristic of FinFET CMOS logic processes, including halo implants, source/drain extensions, and lightly-doped drain ("LDD") structures. The silicon photonic modulator die utilizes PN junction depletion-mode doping profiles optimized for electro-optic phase shifting in silicon rib waveguides, with lateral PN junctions formed by selective implantation of p-type and n-type dopants into the waveguide slab regions. These doping profiles are entirely different in their purpose, concentration levels, junction depths, and spatial configurations. Similarly, the process layers differ: the CMOS die has a standard CMOS back-end-of-line metal stack (typically 10+ metal layers in a 16nm FinFET process), while the modulator die has specialized silicon photonics layers including buried oxide, silicon device layer, waveguide cladding, and a different (typically fewer) number of metallization layers. This sub-element is not met.
Sub-element (3): Electrical connection without bond wires, interposers, or package-level routing. The two dies are electrically connected through copper pillar micro-bumps with a pitch of approximately 40-55 μm. These copper pillar micro-bumps constitute package-level routing — they are an inter-die interconnect mechanism used to bond separately fabricated dies together in a package or module. The micro-bumps introduce parasitic inductance (estimated by Dr. Whitfield at approximately 15-25 pH per bump) and capacitance (approximately 10-20 fF per bump), which, while relatively low compared to wire bonds, are nonetheless non-zero and arise specifically because of the package-level interconnect. This sub-element is not met.
Additionally, the phrase "on a common substrate" independently requires that the driver and modulator reside on the same physical substrate. In Lumos's architecture, the driver and modulator are on separate dies — separate silicon substrates — that are subsequently bonded together via the copper pillar micro-bumps. Under any reasonable reading of "common substrate" in the context of the specification's description of monolithic co-integration, the Lumos architecture does not place the driver and modulator on a "common substrate." Rather, the two components are fabricated on separate substrates and assembled together. This requirement is not met.
Element 1(c): "a high-swing output driver stage configured to generate a differential drive signal of sufficient voltage swing to modulate the Mach-Zehnder modulator between a first optical output state and a second optical output state." Lumos's driver die includes an output driver stage that generates a differential drive signal with sufficient voltage swing (approximately 2.0-2.5 Vpp differential) to modulate the MZM between optical states. This is confirmed by the accused product specifications (Bates Nos. LPI-00008230 through LPI-00008245) and Dr. Whitfield's measurements. This element is met.
Element 1(d): "an impedance matching network disposed between the output driver stage and the modulator electrodes, wherein the impedance matching network is co-integrated on the common substrate." This element requires a co-integrated impedance matching network. While Lumos's driver die does include impedance matching circuitry at its output, this circuitry is on the driver die, not co-integrated with the modulator on a common substrate in the sense required by the Court's construction. The impedance matching is performed partially on the driver die and partially through the micro-bump interconnect structure, not through on-die metallization on a monolithically integrated common substrate. This element is not met, for the same reasons the "co-integrated" limitation in element 1(b) is not met.
Conclusion on Claim 1: Literal infringement of Claim 1 is not viable. Three of the four sub-requirements of the "co-integrated" limitation in element 1(b) are independently not met, and element 1(d) is likewise not met for the same reasons. The non-co-integrated elements of Claim 1 — elements 1(a) and 1(c) — are met by Lumos's accused products, but the failure of the "co-integrated" limitation is dispositive.
B. Claim 5 (Dependent on Claim 1)
Claim 5 of the '890 Patent provides:
5. The driver circuit architecture of claim 1, wherein the pre-emphasis equalization stage comprises a finite impulse response filter having at least three taps, each tap weighted to compensate for a respective frequency-dependent loss characteristic of the modulator.
Claim 5 depends from Claim 1 and adds a further limitation specifying the topology of the pre-emphasis equalization stage. Specifically, Claim 5 requires that the equalization stage comprise a finite impulse response ("FIR") filter with at least three taps, each weighted to compensate for a respective frequency-dependent loss characteristic of the modulator.
As a threshold matter, because Claim 5 depends from Claim 1, it necessarily incorporates all limitations of Claim 1, including the "co-integrated" limitation. Since Claim 1 is not literally infringed under the Court's construction, as set forth in Section III.A above, Claim 5 necessarily cannot be literally infringed.
For completeness, we note that even if the Claim 1 limitations were satisfied, the additional limitation introduced by Claim 5 would likely be met by Lumos's accused products. Dr. Whitfield's analysis indicates that Lumos's driver implements a 4-tap FIR-based pre-emphasis equalizer, with each tap weight programmable to compensate for the MZM's frequency-dependent electro-optic response. See Whitfield Expert Report, ¶¶ 93-95; see also Chow Dep. Tr. at 107:9-108:14 (confirming that the equalizer is "a programmable FIR filter with multiple taps"). This satisfies the "at least three taps" requirement and the functional limitation regarding frequency-dependent loss compensation. However, this observation is academic given the failure on the Claim 1 "co-integrated" limitation.
Conclusion on Claim 5: Literal infringement is not viable. Claim 5 fails on the Claim 1 "co-integrated" limitation that it incorporates by dependency.
C. Claim 8 (Dependent on Claim 1)
Claim 8 of the '890 Patent provides:
8. The driver circuit architecture of claim 1, wherein the modulator operates at a symbol rate of at least 100 Gbaud per lane, and wherein the co-integrated pre-emphasis equalization stage maintains signal integrity sufficient to achieve a target bit error rate of less than 1 × 10⁻² prior to forward error correction at the symbol rate.
Claim 8 depends from Claim 1 and adds a performance limitation requiring that the modulator operate at a symbol rate of at least 100 Gbaud per lane and that the co-integrated pre-emphasis equalization stage maintain signal integrity at that data rate sufficient to achieve a target bit error rate ("BER") of less than 1 × 10⁻² prior to forward error correction ("FEC").
Again, because Claim 8 depends from Claim 1, it incorporates all of Claim 1's limitations, including the "co-integrated" limitation. The failure of the "co-integrated" limitation as applied to Lumos's architecture, detailed in Section III.A above, is dispositive.
For completeness, the additional limitation introduced by Claim 8 would likely be met by Lumos's accused products if the threshold Claim 1 issue were resolved in OWS's favor. The LumosBridge 800G Optical Engine operates at data rates of approximately 100 Gbaud per lane (8 × 100G PAM4 lanes for 800G aggregate), and Lumos's product specifications indicate that the system achieves a pre-FEC BER well below the 1 × 10⁻² threshold specified in Claim 8. See Bates Nos. LPI-00008267 through LPI-00008273 (LumosBridge 800G performance specifications); see also Whitfield Expert Report, ¶¶ 101-104. The LumosEdge 400ZR+ operates at lower data rates per lane but employs coherent modulation at rates that may also satisfy the 100 Gbaud threshold depending on the interpretation of "per lane." However, as with Claim 5, this analysis is academic.
Conclusion on Claim 8: Literal infringement is not viable. Claim 8 fails on the Claim 1 "co-integrated" limitation that it incorporates by dependency.
D. Claim 13 (Independent)
Claim 13 of the '890 Patent provides:
13. A method of driving a silicon photonic Mach-Zehnder modulator, comprising:
(a) receiving a differential electrical data signal at an input stage of a driver circuit;
(b) applying pre-emphasis equalization to the differential electrical data signal using an equalization stage co-integrated with the modulator on a common substrate, wherein the pre-emphasis equalization compensates for frequency-dependent bandwidth limitations of the modulator;
(c) amplifying the equalized differential signal to generate a high-swing differential drive signal; and
(d) applying the high-swing differential drive signal to electrodes of the Mach-Zehnder modulator to modulate an optical carrier signal.
Claim 13 is a separate independent claim directed to a method of driving a silicon photonic MZM. It recites four method steps: (a) receiving a differential electrical data signal, (b) applying pre-emphasis equalization using an equalization stage "co-integrated with the modulator on a common substrate," (c) amplifying the equalized signal, and (d) applying the amplified signal to modulate the MZM.
The critical limitation is step 13(b), which contains the "co-integrated" term in essentially the same context as Claim 1, element 1(b). The Court's construction applies equally to the use of "co-integrated" in Claim 13.
Element-by-Element Mapping:
Step 13(a): "receiving a differential electrical data signal at an input stage of a driver circuit." Lumos's accused products perform this step. The driver die receives a differential electrical data signal from the DSP ASIC via its input stage. This step is met.
Step 13(b): "applying pre-emphasis equalization to the differential electrical data signal using an equalization stage co-integrated with the modulator on a common substrate, wherein the pre-emphasis equalization compensates for frequency-dependent bandwidth limitations of the modulator." The same analysis set forth in Section III.A with respect to Claim 1, element 1(b) applies here. Lumos's driver die performs pre-emphasis equalization, but the equalization stage is not "co-integrated with the modulator on a common substrate" under the Court's construction. The driver and modulator are fabricated in different semiconductor processes, have different doping profiles and process layers, and are electrically connected via copper pillar micro-bumps (package-level routing). This step is not met.
Step 13(c): "amplifying the equalized differential signal to generate a high-swing differential drive signal." Lumos's driver die amplifies the equalized signal to generate a high-swing differential drive signal. This step is met.
Step 13(d): "applying the high-swing differential drive signal to electrodes of the Mach-Zehnder modulator to modulate an optical carrier signal." Lumos's accused products apply the drive signal to the MZM electrodes to modulate an optical carrier. This step is met.
Conclusion on Claim 13: Literal infringement is not viable under the Court's construction. Claim 13 fails on the "co-integrated" limitation in step 13(b), for the same reasons that Claim 1 fails on element 1(b).
E. Summary Table — Literal Infringement
The following table summarizes the literal infringement analysis for all four asserted claims:
As shown, all four asserted claims fail on the "co-integrated" limitation under the Court's construction. The "co-integrated" limitation is the sole basis for non-infringement across all claims; the remaining claim elements — relating to the functional characteristics of the pre-emphasis equalization, the output driver stage, the impedance matching network, and the method steps of receiving, equalizing, amplifying, and applying the drive signal — are generally met by the Lumos accused products. However, this is of no consequence because every asserted claim requires the "co-integrated" limitation, and the failure of that single limitation is dispositive.
IV. Doctrine of Equivalents Analysis
A. Framework
Where literal infringement cannot be established, a patentee may alternatively seek to prove infringement under the doctrine of equivalents ("DOE"). Under this doctrine, infringement may be found if the accused product or method contains elements that are not literally within the scope of the claim but are equivalent to the claimed elements. The Supreme Court's formulation in Warner-Jenkinson Co. v. Harborline Enterprises Davis Chemical Co., 520 U.S. 17 (1997), requires that the DOE analysis proceed on a limitation-by-limitation basis, not on the invention as a whole.
The Federal Circuit applies two alternative tests for equivalence. Under the "function-way-result" test, an element of the accused product is equivalent to a claimed element if it performs substantially the same function, in substantially the same way, to achieve substantially the same result as the claimed element. Under the "insubstantial differences" test, infringement under DOE is established if the differences between the claimed element and the accused element are insubstantial. These tests are complementary and often considered together.
Importantly, DOE is subject to several legal limitations, including prosecution history estoppel (addressed separately in Section V), the all-limitations rule (DOE cannot be applied in a manner that effectively eliminates a claim limitation), and the public dedication rule (the patentee may not recapture through DOE subject matter disclosed but not claimed).
B. Application of DOE to the "Co-Integrated" Limitation
The sole limitation at issue for DOE purposes is the "co-integrated" limitation. The remaining claim elements are literally met by Lumos's accused products and need not be analyzed under DOE. The question, therefore, is whether Lumos's flip-chip bonded architecture — in which a separate CMOS driver die is bonded to the silicon photonic modulator die via copper pillar micro-bumps — is equivalent to the claimed monolithic co-integration under the function-way-result test.
Function. The function of the co-integrated equalization stage, as claimed in the '890 Patent, is to provide pre-emphasis equalization to the modulator drive signal with minimal parasitic losses and signal degradation, thereby enabling high-speed modulation at data rates where parasitic effects of inter-die connections would otherwise impair signal integrity.
Lumos's flip-chip bonded driver performs a substantially similar function: it provides pre-emphasis equalization to the modulator drive signal and is engineered to minimize parasitic losses at the target data rates. However, the copper pillar micro-bump connection inherently introduces some parasitic inductance and capacitance — approximately 15-25 pH and 10-20 fF per bump, as noted above — that is absent in a monolithically co-integrated architecture. Lumos has engineered the micro-bump interconnect to minimize these parasitics (e.g., through careful bump pitch selection, underfill optimization, and co-design of the driver output impedance with the micro-bump parasitics), and the resulting parasitics are significantly lower than those of wire-bond connections. Nevertheless, they are non-zero and represent a fundamental difference from monolithic co-integration.
On balance, the function prong is arguably met at a high level of abstraction — both approaches provide pre-emphasis equalization with reduced (though not eliminated) parasitic losses. However, if the function is defined more precisely to include "elimination" of inter-die parasitic losses (as the specification contemplates), then Lumos's flip-chip approach does not perform the identical function.
Way. The claimed "way" of achieving the function is monolithic co-integration: fabrication of the equalization circuitry and the modulator in the same semiconductor process, sharing the same doping profiles and process layers, with direct electrical connection through on-die metallization. This approach eliminates inter-die interconnects entirely and leverages the precision of lithographic patterning to achieve sub-micron alignment between driver and modulator structures.
Lumos's "way" is fundamentally different: heterogeneous flip-chip assembly. The driver and modulator are fabricated in entirely separate semiconductor processes at different foundries, producing dies with different doping profiles, different process layers, and different substrates. These dies are then assembled together by flip-chip bonding through copper pillar micro-bumps — a package-level assembly process that involves solder reflow, underfill dispensing, and post-bonding curing. The alignment precision of flip-chip bonding (on the order of ±1-3 μm) is orders of magnitude coarser than on-die lithographic alignment (sub-10 nm). The interconnect mechanism — copper pillar micro-bumps — is a form of package-level routing that introduces parasitic elements absent in on-die metallization.
These are fundamentally different approaches to achieving driver-modulator integration. The silicon photonics industry recognizes monolithic co-integration and heterogeneous flip-chip integration as distinct integration paradigms with different tradeoffs, different design constraints, and different supply chain implications. See, e.g., Dr. Ng's Markman tutorial testimony (cited by the Court); see also the '890 Patent specification at col. 2, ll. 14-42 (identifying multi-chip module approaches as the prior art problem). The specification specifically distinguishes multi-chip approaches — including those using "interposers or other package-level interconnects" — and identifies monolithic co-integration as the inventive advance that overcomes the limitations of those approaches.
The "way" prong is not met. The difference between monolithic co-integration and heterogeneous flip-chip bonding is a substantial difference, not an insubstantial one. This is the fundamental weakness of the DOE theory.
Result. Both approaches achieve the broad result of high-speed optical modulation with pre-emphasis equalization. At this level of abstraction, the result prong is arguably met. However, the claimed approach achieves additional specific results that Lumos's approach does not fully replicate: (i) complete elimination of inter-die parasitic losses (rather than mere reduction); (ii) the ability to leverage on-die metallization for impedance matching with nanometer-scale precision; and (iii) simplification of the manufacturing supply chain by requiring only a single semiconductor process and a single foundry. These additional result advantages are inherent to monolithic co-integration and are not achievable through flip-chip assembly.
On balance, the result prong is arguably met at a high level but is weakened by the specific result differences between the two approaches.
C. Assessment of DOE Viability
The DOE argument for the '890 Patent is theoretically articulable but weak. The primary weakness is the "way" prong: monolithic co-integration and heterogeneous flip-chip bonding are recognized in the semiconductor industry as fundamentally different integration paradigms. The patent specification itself draws this distinction as the core of the inventive contribution, treating multi-chip module approaches as the prior art problem and monolithic co-integration as the solution. A jury or court confronted with this distinction would likely find the differences between the two approaches to be substantial, not insubstantial.
Moreover, applying DOE to equate flip-chip bonding with monolithic co-integration would risk violating the all-limitations rule, because it would effectively read the "co-integrated" limitation out of the claims. Under the Court's construction, "co-integrated" requires fabrication in the same process, shared doping profiles and layers, and connection without package-level routing. A DOE finding that flip-chip bonding (different processes, different profiles, package-level routing) is equivalent would reduce the "co-integrated" limitation to a requirement of mere physical proximity — which is precisely the broad construction the Court rejected.
Additionally, as discussed in Section V below, prosecution history estoppel presents a substantial independent bar to the DOE theory.
Taking into account the weakness of the substantive DOE analysis but acknowledging that the DOE argument is at least articulable (unlike the situation with the '567, '234, and '678 Patents, where DOE is clearly barred), we estimate the probability of success on a DOE theory for the '890 Patent at less than 15% before considering prosecution history estoppel, and less than 5-10% after factoring in estoppel (as discussed in Section V).
V. Prosecution History Estoppel Analysis
A. The Amendment and Its Scope
As detailed in Section II.B above, the "co-integrated" limitation was added to the independent claims of the '890 Patent by amendment during prosecution. The amendment was made in connection with a Request for Continued Examination filed on April 15, 2020, in response to a final rejection under 35 U.S.C. § 103 based on the Iyer & Patel reference. The Iyer & Patel reference described the co-design of separately fabricated driver and modulator components in a multi-chip module configuration. The applicant added the "co-integrated with the modulator on a common substrate" limitation to distinguish the claimed invention from the multi-chip approach of Iyer & Patel.
Under Festo Corp. v. Fenmore & Co., 535 U.S. 722 (2002), a narrowing amendment made for reasons of patentability creates a rebuttable presumption that the patentee surrendered all equivalents between the original claim scope and the amended claim scope. Here, the original claims recited a generic "pre-emphasis equalization stage" without the "co-integrated" limitation. The amendment narrowed this to require co-integration with the modulator on a common substrate. The territory between the original broad scope (any equalization stage, regardless of integration approach) and the narrowed scope (only an equalization stage co-integrated with the modulator) was surrendered.
The surrendered territory plainly encompasses Lumos's flip-chip bonded architecture. Lumos uses a separately fabricated driver die that is assembled with the modulator die through package-level interconnects — precisely the type of multi-chip approach that the amendment was designed to distinguish. The applicant's prosecution remarks could not have been more explicit on this point, stating that the claimed invention is "directed to monolithic co-integration of the equalization circuitry and the modulator on a single substrate" and distinguishing "multi-chip module approaches where discrete driver and modulator dies are bonded together through wire bonds, interposers, or other package-level interconnects." (Applicant's Remarks dated April 15, 2020, at 8-9.)
B. Rebuttal of the Festo Presumption
Under Festo, the presumption of surrender can be rebutted if the patentee demonstrates that one of three exceptions applies: (1) the alleged equivalent was unforeseeable at the time of the amendment; (2) the rationale underlying the amendment bears no more than a tangential relation to the alleged equivalent; or (3) there is some other reason suggesting that the patentee could not reasonably have been expected to have described the insubstantial substitute in question.
We have analyzed each exception as applied to the present facts:
(1) Foreseeability. Under the first Festo exception, the presumption of surrender may be rebutted if the alleged equivalent was not foreseeable at the time of the narrowing amendment. Here, the amendment was filed on April 15, 2020. At that time, flip-chip bonding of driver dies to modulator dies was a well-known and widely practiced technique in the silicon photonics industry. Copper pillar micro-bump technology had been in commercial use for years, and multiple companies — including Hollowell Group, Ashbury & Co. (now Cisco), and Greaves Holdings — had publicly described or demonstrated flip-chip bonded driver-modulator assemblies. The Iyer & Patel reference itself, which the amendment was designed to overcome, contemplated multi-chip assembly approaches including flip-chip bonding. The patent specification acknowledges multi-chip approaches as part of the prior art landscape. There is no basis on which to argue that flip-chip bonding of a driver die to a modulator die was unforeseeable at the time of the amendment. This exception is not available.
(2) Tangential Relation. Under the second Festo exception, the presumption of surrender may be rebutted if the rationale for the amendment bears no more than a tangential relation to the alleged equivalent. Here, the amendment was made specifically to distinguish the claimed monolithic co-integration from multi-chip integration approaches in which separately fabricated driver and modulator dies are assembled together. Lumos's flip-chip bonded architecture is a multi-chip integration approach in which a separately fabricated driver die is assembled with a modulator die — precisely the category of prior art that the amendment was intended to overcome. The rationale for the amendment is directly, centrally, and inextricably related to the accused equivalent. This is not a case where the amendment was made for reasons unrelated to the accused equivalent (e.g., to overcome a prior art reference directed to a different aspect of the claims). This exception is not available.
(3) Other Reasons. Under the third Festo exception, the presumption of surrender may be rebutted if there is "some other reason suggesting that the patentee could not reasonably have been expected to have described the insubstantial substitute in question." This is a narrow exception, and courts have found it applicable only in unusual circumstances where, for example, the equivalent involves after-developed technology that did not exist at the time of the amendment. Here, there is no compelling basis for this exception. Flip-chip bonding with copper pillar micro-bumps was well-established technology at the time of the original filing in 2018 and at the time of the amendment in 2020. The applicant was well aware of multi-chip approaches — the specification discusses them at length — and could have drafted claims that encompassed heterogeneous integration if that was the intended scope. Indeed, the specification's detailed discussion of multi-chip approaches as prior art demonstrates that the patentee was fully familiar with these approaches and made a deliberate choice to claim only monolithic co-integration. This exception is not available.
C. Estoppel Conclusion
Prosecution history estoppel presents a strong bar to the application of DOE for the "co-integrated" limitation. The narrowing amendment adding the "co-integrated" limitation was made specifically to overcome prior art describing separately fabricated and assembled driver-modulator configurations. The surrendered territory — between a generic equalization stage and one that is monolithically co-integrated with the modulator — encompasses precisely the flip-chip bonded architecture used by Lumos. None of the three Festo exceptions are available to rebut the presumption of surrender.
This estoppel analysis independently undermines the DOE theory articulated in Section IV above. Even if a court or jury were inclined to find equivalence under the function-way-result test (which we regard as unlikely for the reasons stated in Section IV), prosecution history estoppel would bar the application of DOE to reach Lumos's flip-chip bonded architecture.
Taking the substantive DOE weakness and the prosecution history estoppel bar together, our estimated probability of prevailing on a DOE theory for the '890 Patent is less than 5-10%. This represents a marginal improvement over the companion patents (for which DOE is effectively barred entirely), but it does not represent a viable basis for continuing the litigation.
VI. Lumos's Invalidity Counterclaims — Residual Risk Assessment
Although the focus of this memorandum is on infringement viability rather than validity, we briefly address the residual invalidity risk associated with the '890 Patent because validity considerations bear on settlement leverage and overall case valuation.
A. Prior Art: Iyer & Patel (2018 IEEE Article)
The principal prior art reference cited against the '890 Patent during prosecution was Iyer & Patel, "Co-Design of Modulator Drivers and Silicon Photonic Mach-Zehnder Structures," IEEE Transactions on Circuits and Systems, Vol. 65, No. 8, pp. 2701-2713 (2018). This reference was cited in the final rejection under 35 U.S.C. § 103, in combination with U.S. Patent No. 9,804,475 to Chen et al.
The Iyer & Patel reference describes the co-design of modulator drivers and silicon photonic MZM structures but does not disclose monolithic co-integration of the driver and modulator on a common substrate. Instead, Iyer & Patel contemplates separately fabricated driver and modulator components assembled in a multi-chip module. The claims of the '890 Patent, as narrowed during prosecution to require "co-integration," were allowed over the Iyer & Patel reference specifically because of this distinction.
Under the Court's narrow construction of "co-integrated," the claims of the '890 Patent are quite narrow — they are limited to monolithic co-integration with all of the specific sub-requirements imposed by the Court's construction. This narrow scope arguably strengthens the validity of the claims against prior art challenges. A prior art reference would need to disclose not just a driver circuit for a silicon photonic MZM, but specifically one that is monolithically co-integrated with the modulator in the same semiconductor process, sharing the same doping profiles and process layers, with electrical connection through on-die metallization rather than any form of package-level routing. Such a prior art reference has not been identified.
However, this validity strength is of little practical value. The same narrow construction that makes the claims robust against invalidity challenges simultaneously renders the claims unenforceable against Lumos's accused products. This is a classic prosecution history trap: the narrowing that was necessary to obtain the patent and that now supports validity is the same narrowing that defeats infringement.
B. Section 112 Challenges
Lumos has asserted invalidity of the '890 Patent under 35 U.S.C. § 112, alleging insufficient written description and lack of enablement. We assess this risk as low under the Court's narrow construction.
Written Description. The specification of the '890 Patent provides extensive written description support for monolithic co-integration of driver circuitry with silicon photonic MZMs. The specification describes detailed embodiments in which both the driver and modulator are fabricated on a common SOI substrate in a single process flow. See '890 Patent, col. 5, ll. 12-48; col. 8, ll. 3-37; Figs. 2A-2C, 4. The specification explains the process integration, doping profiles, metal interconnect layers, and electrical connection mechanisms in detail sufficient to demonstrate that the inventors possessed the claimed invention. Under the narrow construction, the claims are directed to precisely what the specification describes in detail. Written description risk is low.
Enablement. The specification provides sufficient enabling disclosure for a person of ordinary skill in the art to practice the claimed invention without undue experimentation. The detailed process flow descriptions, circuit schematics, and simulation results in the specification would enable a skilled engineer to fabricate a monolithically co-integrated driver-modulator architecture as claimed. OWS's own commercial products (the OWS-400ZR and OWS-800LR) demonstrate that the claimed invention can be practiced. Enablement risk is low.
C. Net Invalidity Risk
The narrow construction of "co-integrated" actually reduces the invalidity risk for the '890 Patent, but this is a pyrrhic benefit. The claims are likely valid — they survive challenges under §§ 102, 103, and 112 — but they do not cover the accused products. Lumos's invalidity counterclaims, while still technically pending, present low risk. However, this favorable validity posture does not provide meaningful litigation leverage given the infringement analysis set forth above.
VII. Impact on Damages Theories
The Markman Order's impact on the damages theories for this litigation is severe. Prior to the Markman hearing, OWS's damages estimate for all four asserted patents was in excess of $75 million, based on a reasonable royalty rate of approximately 7.5% applied to Lumos's accused product revenue of approximately $148.6 million for calendar year 2022, with potential enhancement for willful infringement under 35 U.S.C. § 284.
This damages estimate was developed by OWS's damages expert, Dr. Lawrence Kessler of Apex Claim Analytics LLC, using a Georgia-Pacific factor analysis that apportioned the reasonable royalty across all four asserted patents. The apportionment recognized that each patent contributed to the overall value of the accused technology and that the combined royalty reflected the synergistic value of the patent portfolio.
If the '890 Patent were the only surviving patent — and it is, at best, a marginal survivor under a weak DOE theory — the damages analysis would require fundamental restructuring. The royalty rate would need to be re-apportioned to reflect only the value attributable to the '890 Patent standing alone, without the portfolio effect of the other three patents. Even under the most optimistic apportionment, the '890 Patent alone would support only a fraction of the original damages estimate. Based on preliminary apportionment analysis, the '890 Patent was attributed approximately 20-25% of the total royalty value, reflecting its contribution to the driver circuit architecture aspect of the accused products. This would suggest a standalone royalty estimate on the order of $15-19 million at most — but this figure assumes successful establishment of infringement, which is now in serious doubt.
Critically, the extremely low probability of prevailing on DOE (estimated at less than 5-10%) means that the expected value of the damages claim attributable to the '890 Patent is negligible. Applying a probability-weighted analysis: an estimated 5-10% probability of establishing infringement multiplied by a potential standalone damages award of $15-19 million yields an expected value of approximately $0.75-1.9 million. This expected value is likely insufficient to justify the remaining estimated litigation costs through trial, which we estimate at approximately $1.65 million (including expert fees, deposition costs, trial preparation, and trial itself).
We recommend suspending Dr. Kessler's damages analysis pending the outcome of settlement discussions, which we understand the OWS Board is expected to authorize on February 24, 2023. Continuing to invest in expert damages work on a patent with such a low probability of establishing infringement would not be a prudent use of litigation resources.
VIII. Comparison with Other Asserted Patents — Relative Strength
This section briefly cross-references the companion memoranda prepared for the other three asserted patents, to provide context for the relative strength of the '890 Patent within the overall patent portfolio asserted in this litigation.
U.S. Patent No. 10,455,567 (the "'567 Patent" — Waveguide Coupler). The '567 Patent is directed to an adiabatic waveguide coupler for silicon photonics. The key disputed term was "adiabatically coupled," which the Court construed to require a continuous, monotonically varying taper profile. Lumos's accused products employ a segmented (non-continuous) taper that uses discrete step transitions rather than a continuous profile. Under the Court's construction, Lumos's segmented taper is excluded from literal infringement, and there is no viable DOE argument because Lumos's design is a clear design-around that the specification acknowledges as an alternative but does not claim. The '567 Patent is untenable for infringement purposes. See Companion Memorandum re '567 Patent dated February 22, 2023.
U.S. Patent No. 10,678,234 (the "'234 Patent" — Germanium Photodetector). The '234 P

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