PRIVILEGED AND CONFIDENTIAL — ATTORNEY WORK PRODUCT
MEMORANDUM
TO: Alan Ngo, Responsible Partner, intellectual Property Group, Calderwood & Harkness LLP
FROM: Omar Siddiqui, Lead Associate, intellectual Property Group, Calderwood & Harkness LLP
DATE: May 8, 2022
RE: Pre-Suit Infringement Analysis — U.S. Patent No. 11,312,890 ("the '890 Patent") — Lumos Photonics, Inc. Accused Products
MATTER NO.: 1014-00003
Note: Matter number assigned prospectively; engagement letter not yet executed as of this date but anticipated for May 12, 2022.
CLIENT: Optiwave Semiconductor Corp.
REVIEWED BY: Alan Ngo
I. Executive Summary
This memorandum presents a pre-suit infringement analysis evaluating whether Lumos Photonics, Inc. ("Lumos" or "LPI") infringes asserted Claims 1, 5, 8, and 13 of U.S. Patent No. 11,312,890 ("the '890 Patent") through its LumosBridge™ 800G Optical Engine and LumosEdge™ 400ZR+ Pluggable Transceiver products. This memorandum has been prepared at the direction of counsel in anticipation of litigation and is protected as attorney work product.
The '890 Patent, titled "Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators," issued on April 26, 2022, from an application filed on November 15, 2018. The named inventors are Dr. Kevin Fong, who serves as Chief Technology Officer and Co-Founder of Optiwave Semiconductor Corp. ("OWS" or the "Client"), and Rajesh Iyer, a circuit designer at OWS. The patent is assigned to OWS, a Delaware corporation headquartered at 2775 Augustine Drive, Suite 400, San Jose, California 95054. The '890 Patent issued less than two weeks before the date of this memorandum, and accordingly no prior infringement contentions have been served with respect to it.
Overall Assessment. Based on our analysis of the publicly available technical documentation, product datasheets, published papers, conference presentations, and patent filings of Lumos, a colorable infringement case exists under theories of both literal infringement and the doctrine of equivalents for certain claim limitations. However, the key limitation — "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate" — presents a significant vulnerability that is likely to be the focus of Lumos's non-infringement defense and could prove dispositive at the claim construction stage.
The core of the concern is architectural. Lumos's accused products employ a multi-chip module ("MCM") architecture in which the pre-emphasis equalization stage is fabricated on a separate CMOS driver die that is flip-chip bonded to the silicon photonic modulator die via copper pillar micro-bumps. This heterogeneous integration approach uses two separately fabricated dies — a CMOS die for the driver circuitry and a silicon-on-insulator ("SOI") die for the silicon photonic Mach-Zehnder modulator ("MZM") — that are joined at the package level. This multi-chip configuration may not satisfy the "co-integrated" and "common substrate" requirements of the asserted claims, depending on how those terms are construed by the Court.
Risk Rating. We assess a moderate-to-high risk that a narrow claim construction of the term "co-integrated" would defeat literal infringement of all four asserted claims. Doctrine of equivalents arguments are available but are significantly constrained by prosecution history estoppel arising from an amendment made during prosecution that added the "co-integrated" limitation specifically to distinguish prior art disclosing separate driver ICs bonded to photonic chips.
Recommendation. We recommend that the '890 Patent be included in any litigation filing against Lumos, notwithstanding the construction risk, because the patent broadens the infringement narrative to cover the driver circuit architecture — a commercially significant component of Lumos's products not addressed by the other three patents in the proposed assertion portfolio. However, the litigation team should recognize that the '890 Patent carries greater construction risk than initially anticipated, and the strength of the infringement case will depend heavily on the outcome of the Markman hearing with respect to the "co-integrated" limitation.
II. Background
A. The '890 Patent Overview
The '890 Patent is titled "Driver Circuit Architecture for High-Speed Silicon Photonic Mach-Zehnder Modulators" and was issued as U.S. Patent No. 11,312,890 on April 26, 2022. The underlying patent application was filed on November 15, 2018. The named inventors are Dr. Kevin Fong and Rajesh Iyer, both of whom are employees of OWS. Dr. Fong serves as OWS's Chief Technology Officer and Co-Founder, and Mr. Iyer is a senior circuit designer in OWS's Photonics Integration Group. The patent is assigned to OWS.
The '890 Patent is directed to the field of driver circuit architectures for high-speed Mach-Zehnder modulators used in silicon photonic transceivers. More specifically, the patent claims a pre-emphasis equalization stage that is electrically co-integrated with the MZM on a common substrate, a design that enables optimized signal integrity and reduced parasitic losses at data rates of 100 Gbaud and beyond. The patent specification explains that conventional approaches to driving silicon photonic MZMs at high baud rates suffer from degraded frequency response and excessive parasitic capacitance and inductance introduced by the interconnection between a separately fabricated driver integrated circuit and the photonic modulator. The '890 Patent addresses these limitations by co-integrating the pre-emphasis equalization circuitry with the modulator on the same semiconductor substrate, thereby eliminating inter-die bond wires, interposers, and package-level routing paths that introduce parasitic losses and signal integrity degradation at high frequencies.
The patented architecture is implemented in OWS's commercial products, specifically the OWS-400ZR and OWS-800LR coherent optical transceiver chipsets. These chipsets are fabricated by Pinnacle Semiconductor Foundry Co., Ltd. on a 45nm SOI process at Pinnacle's fabrication facility in Hsinchu, Taiwan. OWS's implementation demonstrates the commercial viability of the co-integrated driver-modulator architecture and serves as a basis for understanding the benefits and technical characteristics of the patented approach.
The '890 Patent is part of a substantial intellectual property portfolio held by OWS. As of the date of this memorandum, OWS holds 87 issued U.S. utility patents and has 14 pending utility patent applications. The portfolio is concentrated in several technology areas relevant to silicon photonic transceivers, including waveguide coupling structures, germanium-on-silicon photodetectors, wavelength division multiplexing components, and modulator driver architectures. The '890 Patent is one of four patents proposed for assertion against Lumos in the contemplated litigation, alongside U.S. Patent Nos. 10,785,567 (the "'567 Patent"), 10,923,234 (the "'234 Patent"), and 11,045,678 (the "'678 Patent"), which are addressed in companion memoranda.
B. Prosecution History Summary
The prosecution history of the '890 Patent is directly relevant to the infringement analysis because a key claim limitation — "electrically co-integrated with the modulator on a common substrate" — was added by amendment during prosecution, and the applicant's remarks accompanying that amendment may give rise to prosecution history estoppel that limits the scope of available infringement theories.
During prosecution, the application received two office action rejections. In the first office action, the examiner rejected the original claims under 35 U.S.C. § 103 as obvious in view of several prior art references, including a publication co-authored by one of the named inventors. In the second office action, the examiner maintained certain rejections and introduced additional prior art references disclosing driver circuits that were separately fabricated and wire-bonded to silicon photonic modulator chips.
In response to the second office action, the applicants amended the independent claims to add the requirement that the pre-emphasis equalization stage be "electrically co-integrated with the modulator on a common substrate." In the accompanying remarks, the applicants argued that this limitation distinguished the claimed invention from the prior art approaches cited by the examiner, which disclosed separate driver integrated circuits that were wire-bonded or otherwise externally connected to the photonic modulator chip. The applicants stated, in substance, that the claimed co-integration on a common substrate provides advantages in signal integrity and parasitic reduction that are not achievable through multi-chip module approaches where the driver is separately fabricated and bonded to the modulator die. The examiner allowed the amended claims.
This prosecution history creates a significant estoppel risk for purposes of the doctrine of equivalents. The amendment narrowing the claims to add the "co-integrated" limitation was made for purposes of patentability — specifically, to distinguish prior art disclosing separately fabricated driver circuits bonded to photonic chips. Under the Supreme Court's decision in Festo Corp. v. Fenmore & Co., 535 U.S. 722 (2002), this narrowing amendment gives rise to a presumption that the patentee surrendered the territory between the original claim scope and the amended claim scope. As discussed in greater detail in Section V below, this presumption may effectively bar OWS from arguing that Lumos's separately fabricated, flip-chip bonded driver die is an equivalent of the claimed co-integrated equalization stage.
A key prior art reference cited during prosecution was: Iyer & Patel, "Co-Design of Modulator Drivers and Silicon Photonic Mach-Zehnder Structures," IEEE Transactions on Circuits and Systems, Vol. 65, No. 8, pp. 2701–2713 (2018) (the "Iyer & Patel Reference"). This reference was cited by the examiner under § 103 and was one of the bases for the narrowing amendment. Notably, Rajesh Iyer, one of the named inventors on the '890 Patent, is a co-author of the Iyer & Patel Reference. The article describes co-design methodologies for modulator drivers and silicon photonic MZM structures, and it contemplates both monolithically integrated and multi-chip approaches. The co-design principles discussed in the article informed the development of the '890 Patent's co-integrated architecture, but the article's discussion of multi-chip approaches as alternatives was relied upon by the examiner in rejecting the original, broader claims. The applicants distinguished the Iyer & Patel Reference by pointing to the claimed requirement of co-integration on a common substrate, arguing that the reference's co-design methodology is distinct from the physical co-integration claimed in the '890 Patent. A complete copy of the Iyer & Patel Reference is attached as Appendix D with relevant sections annotated.
C. Accused Products Overview
The accused products are the LumosBridge™ 800G Optical Engine and the LumosEdge™ 400ZR+ Pluggable Transceiver, both manufactured and sold by Lumos Photonics, Inc.
LumosBridge™ 800G Optical Engine. The LumosBridge is a co-packaged optics ("CPO") engine designed for use in hyperscale data center switches. It provides 800 Gbps aggregate bandwidth through eight lanes of 100G PAM4 modulation. The LumosBridge was first shipped to customers in Q1 2022 and carries a unit price in the range of $1,200 to $1,800, depending on configuration and volume. The product integrates a silicon photonic chip containing MZMs for optical modulation with a CMOS driver die that includes pre-emphasis equalization circuitry. As discussed in detail below, the CMOS driver die is flip-chip bonded to the silicon photonic die via copper pillar micro-bumps.
LumosEdge™ 400ZR+ Pluggable Transceiver. The LumosEdge is a pluggable coherent transceiver in the QSFP-DD form factor, designed for metro and data center interconnect ("DCI") applications. The product supports 400G ZR+ operation with extended reach capabilities. The LumosEdge has been in production since Q3 2021 and carries a unit price in the range of $600 to $900. Like the LumosBridge, the LumosEdge employs a silicon photonic MZM paired with a CMOS driver die incorporating pre-emphasis equalization, with the two dies connected via copper pillar micro-bump flip-chip bonding.
The combined estimated revenue from the two accused products for calendar year 2022 is approximately $148.6 million, based on information reported in Lumos's Nasdaq 10-K filing under ticker symbol LMPH. This figure encompasses both domestic and international sales and provides a preliminary basis for damages calculation, subject to further discovery and analysis. The pre-suit damages period (Q1 through Q2 2022, coinciding with the issuance of the '890 Patent on April 26, 2022, and the anticipated filing of the complaint in June 2022) accounts for approximately $62.3 million in estimated revenue.
Lumos Corporate Information. Lumos Photonics, Inc. is a Delaware corporation headquartered at 9400 McNeil Drive, Building 7, Austin, Texas 78758. Lumos operates a semiconductor fabrication facility at 3200 NE Shute Road, Hillsboro, Oregon 97124, and maintains a sales office and engineering center at 4750 Great America Parkway, Suite 320, Santa Clara, California 95054. The company's current leadership includes James "Jim" Harrelson as Chief Executive Officer; Dr. Mei-Lin Chen as Chief Technology Officer; Dr. Nikolai Petrov as Vice President of Engineering, Photonics Division; and Richard Talbot as General Counsel. Lumos has been publicly traded on the Nasdaq exchange since its 2021 initial public offering. As of the anticipated filing date of June 2022, Lumos's market capitalization is approximately $1.87 billion. The company's largest institutional shareholder is Ridgeline Asset Management, LLC, which holds an approximately 9.2% equity stake.
D. Lumos's Driver Architecture (Based on Publicly Available Information)
Our analysis of Lumos's driver architecture is based on publicly available information, including Lumos's published technical papers, product datasheets, conference presentations (including presentations at OFC 2021 and ECOC 2021), and Lumos's own patent filings. We have not yet had access to Lumos's internal design documents, process flow specifications, or packaging integration details, which would be obtained through discovery in the contemplated litigation. The following description reflects our current best understanding of the accused products' architecture based on these publicly available sources.
Based on the available evidence, the LumosBridge 800G Optical Engine and LumosEdge 400ZR+ Pluggable Transceiver products employ a multi-chip module architecture for the driver-modulator integration. In this architecture, the MZM is fabricated on a silicon photonics ("SiPh") die using a silicon-on-insulator process. The SiPh die contains the optical waveguide structures, including the Mach-Zehnder interferometer arms with PN junction phase shifters, as well as passive optical components such as waveguide splitters, combiners, and edge couplers.
Separately, the driver circuit — including a pre-emphasis equalization stage — is fabricated on a CMOS die using a standard CMOS process (believed to be a 28nm or 16nm FinFET process, based on Lumos's published descriptions of driver performance characteristics and die photographs). The CMOS driver die contains the complete electronic signal path from the digital-to-analog conversion stage through the pre-emphasis equalization filter to the output driver amplifier stage.
The CMOS driver die is then flip-chip bonded to the silicon photonic modulator die via copper pillar micro-bumps. This is a heterogeneous integration approach: two separately fabricated dies, manufactured using different process technologies (CMOS for the driver and SOI for the SiPh modulator), are bonded together at the package level. The copper pillar micro-bumps provide the electrical connections between the driver output and the modulator input, as well as ground and power connections between the two dies. The micro-bump pitch is reported in Lumos's published materials as approximately 45 μm, and the total number of micro-bumps per driver-modulator pair is in the range of 200 to 400.
This architecture is fundamentally different from the approach contemplated by the '890 Patent. OWS's patented invention requires the pre-emphasis equalization circuitry to be fabricated in the same semiconductor process and on the same substrate as the MZM, thereby eliminating the need for inter-die bonding, wire bonds, interposers, or package-level routing. In OWS's commercial implementation of the patented architecture (the OWS-400ZR and OWS-800LR chipsets), both the MZM and the driver equalization circuitry are fabricated on a single SOI substrate in a unified 45nm SOI process, with all electrical connections between the equalization stage and the modulator formed as on-chip metal interconnects within the substrate's metallization stack.
By contrast, Lumos's approach places the equalization circuitry on a physically separate CMOS die, connected to the modulator die through copper pillar micro-bumps — which are package-level connections formed on top of and between separate substrates, not monolithic on-chip connections formed within a single substrate. This architectural distinction is at the heart of the infringement analysis that follows.
III. Claim-by-Claim Infringement Analysis
A. Claim 1 (Independent Claim)
1. Claim Language
Claim 1 of the '890 Patent recites as follows:
1. An optical modulator system, comprising:
(a) a silicon photonic Mach-Zehnder modulator formed on a substrate;
(b) a pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate, wherein the equalization stage is configured to receive a data signal and to generate a pre-emphasized drive signal;
(c) wherein the equalization stage is configured to compensate for frequency-dependent loss in the modulator by applying a transfer function that boosts high-frequency components of the data signal relative to low-frequency components; and
(d) wherein electrical connections between the equalization stage and the modulator are formed within the substrate.
The critical disputed term in Claim 1 is found in element (b): "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate." As discussed throughout this memorandum, the construction of this phrase — and in particular, the meaning of "electrically co-integrated" and "common substrate" — will determine whether Lumos's multi-chip, flip-chip bonded architecture can infringe the claim.
2. Element-by-Element Analysis
Element (a): "A silicon photonic Mach-Zehnder modulator formed on a substrate."
Lumos's LumosBridge 800G Optical Engine and LumosEdge 400ZR+ Pluggable Transceiver each include a silicon photonic Mach-Zehnder modulator formed on a silicon-on-insulator substrate. This is confirmed by Lumos's published product datasheets, which describe the products as incorporating "high-performance silicon photonic Mach-Zehnder modulators fabricated on SOI substrates." Additionally, Lumos's published technical papers describe the MZM structure in detail, including PN junction phase shifters formed in the silicon device layer of the SOI substrate, with waveguide structures defined by standard silicon photonic fabrication processes including deep UV lithography and reactive ion etching.
There is no reasonable basis on which Lumos could contest that its products include a silicon photonic MZM formed on a substrate. This element would be satisfied under any reasonable claim construction.
Assessment: Satisfied.
Element (b): "A pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate."
This is the central disputed limitation and the primary vulnerability in the infringement case. The analysis of this element requires careful consideration of the claim language, specification, and prosecution history.
Lumos's Architecture. Lumos's accused products include a pre-emphasis equalization stage that is part of the CMOS driver die. The equalization stage receives a data signal and generates a pre-emphasized drive signal that is applied to the MZM to compensate for frequency-dependent losses. Thus, the functional requirement of this limitation — the existence of a pre-emphasis equalization stage — is met. The dispute concerns whether the equalization stage is "electrically co-integrated with the modulator on a common substrate."
In Lumos's architecture, the equalization stage is located on a separate CMOS die that is distinct from the SOI die on which the MZM is formed. The two dies are fabricated using different semiconductor processes (CMOS for the driver, SOI for the modulator), on different wafers, at different fabrication facilities, and potentially at different foundries. After fabrication, the CMOS driver die is flip-chip bonded to the SiPh modulator die using copper pillar micro-bumps. The resulting assembly is a multi-chip module in which the equalization stage and the modulator reside on physically separate semiconductor substrates that are electrically connected through package-level interconnections (i.e., copper pillar micro-bumps).
Literal Infringement Analysis. Under OWS's preferred broad construction of the term "co-integrated" — meaning "an equalization circuit located on the same substrate as the modulator" — OWS might argue that the flip-chip bonded assembly creates, in effect, a combined substrate that satisfies the "common substrate" requirement. Under this theory, once the CMOS driver die is bonded to the SiPh modulator die, the two dies together form a unitary structure that can be characterized as a "common substrate." However, this argument is a significant stretch. The two dies retain their separate substrates — the CMOS die has its own silicon substrate with its own epitaxial layers and metallization stack, and the SiPh die has its own SOI substrate with its own buried oxide layer and silicon device layer. The copper pillar micro-bumps between them are package-level connections, not structures "within" either substrate. No reasonable person of ordinary skill in the art would describe a flip-chip bonded MCM as having a "common substrate" in the sense that a monolithically integrated circuit has a common substrate.
Under a narrow construction — which Lumos would likely propose, defining "co-integrated" to mean "fabricated in the same semiconductor process as the modulator, sharing the same doping profiles and process layers, and electrically connected without bond wires, interposers, or package-level routing" — Lumos's architecture clearly does not satisfy this limitation. The equalization stage is fabricated in a different process (CMOS vs. SOI), on a different wafer, with different doping profiles and different process layers, and the electrical connections between the equalization stage and the modulator are formed via package-level copper pillar micro-bumps rather than through on-chip interconnects.
The prosecution history weighs heavily against OWS's broader construction. As discussed in Section II.B above, the "co-integrated" limitation was added by amendment specifically to distinguish prior art references that disclosed driver circuits separately fabricated and bonded to the modulator. The applicant's remarks during prosecution expressly contrasted the claimed co-integrated approach with "multi-chip module approaches where the driver is separately fabricated and bonded to the modulator die." This language from the prosecution history maps directly onto Lumos's accused architecture, strongly suggesting that the applicants intended to — and did — disclaim coverage of Lumos's type of approach when they added the "co-integrated" limitation.
Doctrine of Equivalents Analysis. Under the function-way-result test, OWS could argue that Lumos's flip-chip bonded driver die performs substantially the same function (providing pre-emphasis equalization to the modulator), in substantially the same way (applying a transfer function to boost high-frequency components), to achieve substantially the same result (compensated modulator output with improved high-frequency performance). However, the "way" prong is problematic: flip-chip bonding a separate CMOS die to a SiPh die via copper pillar micro-bumps is arguably a substantially different "way" of achieving the result compared to monolithic co-integration on a common substrate. The monolithic approach eliminates inter-die parasitic losses entirely, while the flip-chip approach merely minimizes them. A person of ordinary skill in the art would recognize that these are fundamentally different integration philosophies with different design constraints, fabrication requirements, and performance tradeoffs.
More importantly, the doctrine of equivalents analysis is significantly constrained by prosecution history estoppel under Festo. Because the "co-integrated" limitation was added by amendment to overcome prior art, there is a presumption that OWS surrendered the territory between the original claim scope (which would have encompassed separately fabricated and bonded drivers) and the amended claim scope (which requires co-integration on a common substrate). Flip-chip bonding with copper pillar micro-bumps was a well-known and commercially available integration technique at the time the amendment was made, and it was precisely the type of approach the applicants argued the claims were distinguished from. The DOE argument for this element is therefore significantly weakened, as discussed in greater detail in Section V below.
Assessment: Likely NOT satisfied under a narrow construction of "co-integrated." DOE argument available but significantly weakened by prosecution history estoppel.
Element (c): "The equalization stage configured to compensate for frequency-dependent loss in the modulator by applying a transfer function that boosts high-frequency components of the data signal relative to low-frequency components."
Lumos's CMOS driver die includes a pre-emphasis equalization function that compensates for the frequency-dependent roll-off characteristic of the silicon photonic MZM. This is confirmed by Lumos's published technical papers, which describe the driver's equalization stage as implementing a peaking transfer function that provides frequency-dependent gain to counteract the MZM's bandwidth limitations. Specifically, Lumos's OFC 2021 paper describes the equalization stage as providing "up to 8 dB of high-frequency peaking at 50 GHz to compensate for the MZM's 3-dB electro-optic bandwidth of approximately 35 GHz." This description maps directly onto the claimed function of "compensat[ing] for frequency-dependent loss in the modulator by applying a transfer function that boosts high-frequency components of the data signal relative to low-frequency components."
This element is likely met regardless of the construction adopted for other limitations in the claim. There is no reasonable basis on which Lumos could argue that its driver does not compensate for frequency-dependent loss in the modulator.
Assessment: Satisfied.
Element (d): "Electrical connections between the equalization stage and the modulator formed within the substrate."
In Lumos's architecture, the electrical connections between the driver die (containing the equalization stage) and the modulator die are formed via copper pillar micro-bumps. These micro-bumps are package-level interconnection structures that sit on top of and between the two separate substrates. They are formed by depositing copper pillars on the bond pads of one die and reflowing solder caps to connect to corresponding bond pads on the other die during the flip-chip bonding process. These structures are not formed "within" either substrate; rather, they are formed on the surfaces of the two dies and in the gap between them.
Under any reasonable construction, copper pillar micro-bumps are not electrical connections "formed within the substrate." The claim language specifies that the connections are formed "within the substrate" — language that naturally and unambiguously refers to on-chip interconnects formed within the metallization stack of a semiconductor substrate, such as metal traces, vias, and contact layers fabricated during the semiconductor manufacturing process. Package-level connections such as micro-bumps, wire bonds, and solder balls are, by definition, not "within" a substrate but rather "on" or "between" substrates.
This element presents an independent and potentially dispositive barrier to infringement, distinct from the "co-integrated" limitation of element (b). Even if the Court were to adopt a broad construction of "co-integrated" that could encompass flip-chip bonded assemblies, the "within the substrate" language of element (d) would still likely exclude Lumos's architecture because the copper pillar micro-bump connections are not formed within any substrate.
Assessment: Likely NOT satisfied.
3. Claim 1 Overall Assessment
At least two elements of Claim 1 — element (b) ("co-integrated with the modulator on a common substrate") and element (d) ("electrical connections . . . formed within the substrate") — present serious infringement vulnerabilities. Both limitations point to a common architectural distinction between the claimed co-integrated, monolithic approach and Lumos's multi-chip, flip-chip bonded approach.
Literal infringement of Claim 1 is unlikely under a narrow construction of "co-integrated" and "within the substrate." The prosecution history strongly supports a narrow construction, as the applicants expressly distinguished multi-chip bonded driver approaches during prosecution. Doctrine of equivalents arguments are available for element (b) but are significantly weakened by prosecution history estoppel arising from the narrowing amendment. For element (d), DOE arguments are even more difficult to sustain because the difference between on-chip interconnects "within" a substrate and package-level copper pillar micro-bumps "between" separate substrates is substantial and well understood in the art.
Overall Claim 1 Assessment: Literal infringement unlikely; DOE arguments available but significantly constrained.
B. Claim 5 (Dependent Claim)
Claim 5 of the '890 Patent depends from Claim 1 and adds a further limitation specifying the structure of the pre-emphasis equalization stage:
5. The optical modulator system of claim 1, wherein the pre-emphasis equalization stage comprises a finite impulse response (FIR) filter with programmable tap coefficients.
Based on Lumos's published technical papers and conference presentations, the pre-emphasis equalization stage in Lumos's CMOS driver die implements an FIR-based equalizer architecture with configurable (programmable) tap coefficients. Specifically, Lumos's ECOC 2021 presentation described the driver's equalizer as "a 5-tap FIR filter with digitally programmable tap weights, enabling adaptive pre-emphasis compensation across varying MZM bandwidth and channel loss conditions." This description is consistent with, and appears to satisfy, the additional limitation of Claim 5 requiring "a finite impulse response (FIR) filter with programmable tap coefficients."
However, because Claim 5 depends from Claim 1, all of the limitations of Claim 1 are incorporated into Claim 5 by reference. Accordingly, the deficiencies identified for Claim 1 — specifically, the failure to satisfy elements (b) and (d) under a narrow construction — carry forward to Claim 5 with full force. The additional dependent limitation of Claim 5 neither helps nor hurts the infringement analysis: it is an additional limitation that Lumos's products likely satisfy, but it does not cure the deficiencies in the independent claim from which it depends.
Assessment: Same vulnerabilities as Claim 1. The additional dependent limitation is likely satisfied but does not overcome the shortcomings of the independent claim.
C. Claim 8 (Independent Claim)
Claim 8 is a second independent claim of the '890 Patent, directed to a method rather than an apparatus. Claim 8 recites:
8. A method of operating a silicon photonic transceiver, comprising:
(i) generating a modulated optical signal using a silicon photonic Mach-Zehnder modulator formed on a substrate;
(ii) applying a pre-emphasis equalized drive signal to the modulator, the drive signal generated by an equalization circuit co-integrated on the same substrate as the modulator; and
(iii) routing the drive signal from the equalization circuit to the modulator through on-substrate interconnects formed in metallization layers of the substrate.
The method steps of Claim 8 present the same fundamental vulnerabilities as the corresponding apparatus limitations of Claim 1.
Step (i) — generating a modulated optical signal using a silicon photonic MZM formed on a substrate — is satisfied by Lumos's products for the same reasons that element (a) of Claim 1 is satisfied. Lumos's products generate modulated optical signals using silicon photonic MZMs formed on SOI substrates.
Step (ii) — applying a pre-emphasis equalized drive signal generated by "an equalization circuit co-integrated on the same substrate as the modulator" — presents the same vulnerability as element (b) of Claim 1. Lumos's equalization circuit is fabricated on a separate CMOS die, not co-integrated on the same substrate as the MZM. Notably, Claim 8 uses the phrase "co-integrated on the same substrate" rather than "co-integrated . . . on a common substrate" as in Claim 1, but this linguistic variation does not materially change the analysis. If anything, the phrase "same substrate" in Claim 8 is even more explicitly directional toward a single, unified substrate rather than a multi-chip assembly. Under a narrow construction, Lumos's flip-chip bonded CMOS driver die does not satisfy the "co-integrated on the same substrate" requirement.
Step (iii) — routing the drive signal through "on-substrate interconnects formed in metallization layers of the substrate" — presents the same vulnerability as element (d) of Claim 1 and is, if anything, more explicit in excluding Lumos's architecture. The language "on-substrate interconnects formed in metallization layers of the substrate" unambiguously refers to metal traces and vias within the metallization stack of a semiconductor substrate. Copper pillar micro-bumps are not "on-substrate interconnects formed in metallization layers" — they are package-level interconnection structures formed on top of the substrate surface. There is no reasonable construction under which copper pillar micro-bumps constitute interconnects "formed in metallization layers of the substrate."
Assessment: Same analysis and conclusion as Claim 1. Literal infringement is unlikely under a narrow construction of "co-integrated on the same substrate" and "on-substrate interconnects formed in metallization layers." DOE arguments are available but constrained by prosecution history estoppel for the same reasons discussed in connection with Claim 1.
D. Claim 13 (Dependent Claim)
Claim 13 depends from Claim 8 and adds a limitation requiring shared ground planes and power distribution networks:
13. The method of claim 8, wherein the equalization circuit and the Mach-Zehnder modulator share common ground planes and power distribution networks formed in the same metallization layers of the substrate.
This limitation is definitively not met by Lumos's multi-chip architecture. In Lumos's products, the CMOS driver die and the SiPh modulator die have entirely separate metallization stacks. Each die has its own set of metal layers, formed during its respective fabrication process, with its own ground planes and power distribution networks designed and optimized for the specific die's electrical requirements. The CMOS driver die's metallization stack is fabricated in a CMOS process with a different number of metal layers, different metal thicknesses, and different design rules than the SiPh modulator die's metallization stack fabricated in an SOI process.
While the copper pillar micro-bumps provide inter-die ground and power connections — that is, they electrically connect the ground planes and power networks of the two dies to one another — these connections do not make the ground planes and power distribution networks "common" in the sense required by the claim. The claim requires that the equalization circuit and the MZM "share common ground planes and power distribution networks formed in the same metallization layers." In Lumos's products, the ground planes and PDNs are formed in different metallization layers on different dies; they are connected to each other through package-level micro-bumps, but they are not "common" ground planes or PDNs "formed in the same metallization layers."
This limitation is the most clearly unmet of all the limitations across the four asserted claims. There is no colorable argument — under literal infringement or the doctrine of equivalents — that Lumos's products satisfy this requirement.
Assessment: NOT satisfied. This claim is the weakest of the four asserted claims against Lumos's architecture and presents the lowest probability of a successful infringement finding.
IV. Construction Risk Assessment for Key Disputed Term
A. "Pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate"
The construction of this phrase will be the most significant issue at the Markman hearing with respect to the '890 Patent. We set forth below the competing constructions, the relevant intrinsic and extrinsic evidence, and our assessment of the construction risk.
OWS's Preferred Construction. OWS is likely to propose that "pre-emphasis equalization stage electrically co-integrated with the modulator on a common substrate" means "an equalization circuit located on the same substrate as the modulator." This construction focuses on the physical co-location of the equalization circuit and the modulator and avoids imposing any specific requirement as to how the equalization circuit and the modulator are fabricated. Under this construction, a flip-chip bonded CMOS driver die could potentially be considered "located on the same substrate as the modulator" if the assembly is viewed as a unitary package with a common substrate. However, as noted above, this argument requires treating the combined MCM assembly as having a "common substrate," which is a difficult position to defend in light of the intrinsic evidence.
Anticipated Lumos Construction. Lumos is expected to propose that the disputed phrase means "an equalization circuit fabricated in the same semiconductor process as the modulator, sharing the same doping profiles and process layers, and electrically connected without bond wires, interposers, or package-level routing." This narrow construction would definitively exclude Lumos's multi-chip architecture, in which the equalization circuit is fabricated in a separate CMOS process and connected to the modulator through copper pillar micro-bumps.
Intrinsic Evidence Analysis.
Claim Language. The term "co-integrated" is a compound term that suggests fabrication together — the prefix "co-" implies joint or mutual action, and "integrated" in the semiconductor context refers to the fabrication of circuit elements as part of an integrated circuit process. The natural reading of "co-integrated" is that the equalization stage and the modulator are integrated together in a common fabrication process, not merely co-located in a common package. Similarly, "common substrate" most naturally refers to a single semiconductor substrate — i.e., a single silicon wafer or die — on which both the equalization circuit and the modulator are formed, rather than a package substrate or a multi-die assembly. While the claim language alone is not dispositive, it favors a construction closer to Lumos's proposed construction than to OWS's.
Specification. The specification of the '890 Patent describes embodiments in which the driver equalization circuitry is fabricated alongside the MZM in a common silicon photonic process. The specification discusses the advantages of this approach, including the elimination of inter-die parasitics, the ability to use on-chip metal interconnects for signal routing, and the optimization of the equalization transfer function based on knowledge of the modulator's fabrication process parameters. Critically, the specification does not describe any embodiment in which the equalization stage is fabricated on a separate die and connected to the modulator through flip-chip bonding, wire bonding, or any other package-level interconnection technique. While the absence of a disclosed embodiment does not necessarily exclude it from the claim scope, the lack of any description of flip-chip bonded or MCM approaches weakens OWS's argument that such approaches fall within the scope of "co-integrated."
Prosecution History. As discussed in Sections II.B and V of this memorandum, the prosecution history is the most damaging intrinsic evidence for OWS's broad construction. The applicants' remarks during prosecution expressly contrasted the claimed co-integrated approach with "multi-chip module approaches where the driver is separately fabricated and bonded to the modulator die." This statement is a clear and unambiguous disclaimer of coverage for multi-chip bonded approaches, and it directly supports Lumos's narrow construction. A court applying the Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005) framework would give significant weight to this prosecution history in construing the disputed term.
Extrinsic Evidence Considerations.
In the silicon photonics field, the terms "co-integrated" and "monolithically integrated" are generally understood to refer to circuit elements that are fabricated in the same process on the same wafer, resulting in a single die that contains all of the integrated components. This usage is consistent across technical dictionaries, IEEE publications, and industry white papers. By contrast, approaches involving the joining of separately fabricated dies — whether through flip-chip bonding, wire bonding, or other techniques — are described using terms such as "heterogeneously integrated," "hybrid integrated," or "multi-chip module." The distinction between monolithic/co-integration and flip-chip/MCM approaches is well established and well understood by persons of ordinary skill in the art.
For example, the IEEE Journal of Selected Topics in Quantum Electronics has published numerous articles distinguishing between "monolithically integrated silicon photonic transceivers" and "heterogeneously integrated" or "hybrid" transceivers that use multi-chip module approaches. Similarly, Lumos's own published papers describe its products as employing "heterogeneous integration" or "hybrid integration" of CMOS driver and silicon photonic modulator dies — terminology that Lumos explicitly contrasts with "monolithic" or "co-integrated" approaches.
While extrinsic evidence is subordinate to intrinsic evidence under Phillips, it reinforces the narrow construction and would likely be persuasive to the Court, particularly if presented through expert testimony from a qualified person of ordinary skill in the art.
Risk Assessment. There is a high risk that the Court will adopt a narrow construction of "co-integrated" that is aligned with Lumos's position or is at least closer to Lumos's proposed construction than to OWS's. The prosecution history is particularly damaging because the applicant's own statements during prosecution directly contrast co-integration with multi-chip bonded approaches — precisely the architecture Lumos employs. The claim language, specification, and extrinsic evidence all point in the same direction. While OWS will make vigorous arguments for a broader construction, and the outcome of any Markman hearing is inherently uncertain, we believe the weight of the evidence favors a narrow construction on this term.
Comparison to Other Patents in Suit. The construction risk for the '890 Patent's "co-integrated" term is comparable in magnitude and character to the construction risks identified for key disputed terms in the other three patents proposed for assertion:
• The '567 Patent's "adiabatically coupled" limitation, where Lumos uses a segmented (non-continuous) taper that may fall outside a narrow construction of "adiabatic."
• The '234 Patent's "continuously varying germanium concentration" limitation, where Lumos uses a step-graded SiGe buffer with four discrete composition steps (Ge fractions of 0.25, 0.50, 0.75, and 1.0) rather than a truly continuous gradient.
• The '678 Patent's "monolithically formed on a single silicon die" limitation, where Lumos uses micro-transfer-printed III-V gain elements bonded to the silicon photonic integrated circuit.
Each of these disputed terms presents a similar pattern: the claim was narrowed during prosecution to add a specificity requirement that was intended to distinguish prior art, and the accused product employs an alternative technical approach that may fall outside the narrowed claim scope. This pattern of vulnerability across the assertion portfolio is a significant strategic consideration that is addressed in the recommendations section of this memorandum.
V. Prosecution History Estoppel Analysis
The doctrine of prosecution history estoppel, as articulated by the Supreme Court in Festo Corp. v. Fenmore & Co., 535 U.S. 722 (2002), provides that when a patent claim is narrowed by amendment during prosecution for a reason related to patentability, there is a presumption that the patentee surrendered the territory between the original claim scope and the amended claim scope for purposes of the doctrine of equivalents. This presumption can be rebutted only if the patentee can demonstrate that one of three narrow exceptions applies: (1) the equivalent was unforeseeable at the time of the amendment; (2) the rationale for the amendment bears no more than a tangential relation to the equivalent in question; or (3) there is some other reason the patentee could not reasonably have been expected to draft a claim that literally covered the alleged equivalent.
Application to the '890 Patent. The amendment adding the "co-integrated" limitation to the claims of the '890 Patent was made in response to examiner rejections based on prior art that disclosed separately fabricated driver circuits bonded to photonic modulator chips. The amendment was unambiguously made for a reason related to patentability — it was the basis on which the applicants overcame the prior art rejections and obtained allowance of the claims. Accordingly, the Festo presumption of estoppel applies.
The territory surrendered by the amendment is the space between the original, broader claims (which did not require co-integration and would have encompassed any driver circuit associated with the modulator, including separately fabricated and bonded drivers) and the amended claims (which require the equalization stage to be "electrically co-integrated with the modulator on a common substrate"). Lumos's accused products — which use a separately fabricated CMOS driver die flip-chip bonded to the SiPh modulator die — fall squarely within this surrendered territory.
Analysis of Festo Exceptions.
Exception 1: Unforeseeability. This exception applies when the alleged equivalent was unforeseeable at the time of the narrowing amendment and therefore could not have been anticipated by the patentee. Flip-chip bonding with copper pillar micro-bumps was a well-established and commercially deployed interconnection technology at the time of the '890 Patent's filing in November 2018 and at the time the narrowing amendment was made during prosecution. Copper pillar micro-bump technology had been in use for high-performance semiconductor packaging since at least the early 2010s, and numerous published papers and commercial products employed flip-chip bonded multi-chip modules for silicon photonic applications prior to 2018. This exception is therefore unlikely to apply.
Exception 2: Tangential Relation. This exception applies when the rationale underlying the narrowing amendment bears no more than a tangential relation to the equivalent in question. Here, the rationale for the amendment was specifically to distinguish the claimed invention from prior art approaches using separately fabricated and bonded driver circuits. The equivalent at issue — a separately fabricated CMOS driver die flip-chip bonded to the modulator die — is the very type of approach the amendment was intended to distinguish. The relationship between the amendment rationale and the alleged equivalent is not tangential; it is direct and central. This exception does not apply.
Exception 3: Other Reason. This exception applies when there is "some other reason" the patentee could not reasonably have been expected to draft a claim that literally covered the alleged equivalent. This is a narrow and rarely successful exception. Given that flip-chip bonded multi-chip module architectures for silicon photonic transceivers were well known at the time of the amendment, and given that the applicants were experienced practitioners in the field (Dr. Fong and Mr. Iyer are both senior technical professionals in the silicon photonics industry), there is no apparent reason why the applicants could not have drafted claims broad enough to cover flip-chip bonded driver architectures if they had intended to do so. The fact that they chose to narrow the claims to require co-integration — and expressly distinguished multi-chip bonded approaches in their prosecution remarks — indicates a deliberate choice to disclaim such approaches in exchange for overcoming the prior art rejections. This exception is unlikely to apply.
Conclusion. Prosecution history estoppel under Festo significantly limits, and likely eliminates, the availability of doctrine of equivalents arguments for the "co-integrated" limitation of the '890 Patent claims. OWS bears the burden of rebutting the Festo presumption, and none of the three recognized exceptions appears to be available on the facts presented. This conclusion reinforces the assessment that the infringement case for the '890 Patent depends almost entirely on the claim construction outcome: if the Court adopts a narrow construction of "co-integrated," both literal infringement and DOE arguments will be foreclosed, and the '890 Patent will not contribute to OWS's case against Lumos.
VI. Invalidity Considerations Specific to the '890 Patent
A comprehensive validity risk assessment for all four asserted patents is being prepared as a separate consolidated memorandum and is expected to be completed by May 22, 2022. The following discussion addresses invalidity considerations that are specific to the '890 Patent and are relevant to the overall pre-suit assessment.
Key Prior Art Reference: Iyer & Patel (2018). The most significant prior art reference identified during prosecution of the '890 Patent is the Iyer & Patel article, "Co-Design of Modulator Drivers and Silicon Photonic Mach-Zehnder Structures," published in IEEE Transactions on Circuits and Systems, Vol. 65, No. 8, pp. 2701–2713 (2018). This reference was cited by the examiner under 35 U.S.C. § 103 and was a primary basis for the narrowing amendment discussed above.
Notably, Rajesh Iyer, one of the named inventors on the '890 Patent, is a co-author of the Iyer & Patel article. This creates a potentially awkward dynamic in litigation: the prior art reference that prompted the narrowing amendment was authored, in part, by one of the inventors of the patent being asserted. While this does not create a legal impediment to the assertion of the '890 Patent (the claims as amended are presumed valid under 35 U.S.C. § 282, and the examiner allowed the claims over the Iyer & Patel reference after the amendment), it may be used by Lumos's counsel to create an unfavorable narrative — suggesting that the claimed invention is merely an incremental variation on work that the inventor himself had previously published.
The Iyer & Patel article describes co-design principles for modulator drivers and silicon photonic MZM structures. Critically, the article discusses both monolithically integrated and multi-chip module approaches, presenting them as alternative implementations of the co-design methodology. The article does not specifically disclose a pre-emphasis equalization stage co-integrated with the MZM on a common substrate — the specific claim language that distinguishes the '890 Patent — but it does discuss the theoretical advantages and design considerations of co-integrating driver circuitry with the modulator on a common SOI platform. Lumos will likely argue that the combination of the Iyer & Patel article with other references (such as references disclosing specific FIR-based equalization architectures or specific SOI co-integration techniques) renders the claims of the '890 Patent obvious under § 103.
Section 112 Risks. In addition to prior art-based invalidity arguments, Lumos may raise challenges under 35 U.S.C. § 112. Lumos may argue that the specification of the '890 Patent does not provide adequate written description support for the full scope of the term "co-integrated," or that the claims are indefinite as to the boundary between what constitutes "co-integrated" on a "common substrate" and what constitutes package-level integration of separate dies. If the Court construes "co-integrated" broadly (in OWS's favor), Lumos could argue that the specification does not support such a broad construction because it only describes monolithic integration embodiments and does not describe any embodiment involving multi-chip bonding or heterogeneous integration. Conversely, if the Court construes "co-integrated" narrowly (in Lumos's favor), the § 112 challenges become less relevant because the narrow construction is well supported by the specification.
Overall Validity Risk. Based on the available information, we assess the overall validity risk for the '890 Patent as moderate. The claims as amended appear to distinguish over the Iyer & Patel reference by requiring co-integration on a common substrate, and the examiner allowed the claims after the amendment. However, Lumos will likely identify additional prior art references — beyond those cited during prosecution — and construct obviousness combinations that target the "co-integrated" limitation from a different angle. The § 112 risks are secondary but could become significant depending on the claim construction adopted by the Court.
VII. Damages Implications
If infringement of the '890 Patent can be established — which, as discussed above, requires a favorable claim construction on the "co-integrated" limitation — damages would be calculated under a reasonable royalty theory pursuant to 35 U.S.C. § 284. This section provides a preliminary assessment of the damages implications specific to the '890 Patent.
Revenue Base. The combined estimated revenue from the two accused products (LumosBridge 800G and LumosEdge 400ZR+) for calendar year 2022 is approximately $148.6 million, based on information reported in Lumos's Nasdaq 10-K filing. The pre-suit damages period, spanning from Q1 through Q2 2022 and coinciding with the issuance of the '890 Patent on April 26, 2022, and the anticipated filing of the complaint in June 2022, encompasses approximately $62.3 million in estimated revenue. Post-filing damages would continue to accrue through the pendency of the litigation.
Damages Expert. OWS's damages expert has not yet been formally retained. We anticipate engaging Dr. Lawrence Kessler of Apex Claim Analytics LLC, who has extensive experience in patent damages analysis in the semiconductor and photonics industries. Dr. Kessler would apply a Georgia-Pacific factor analysis to determine a reasonable royalty rate for the '890 Patent, considering factors such as the nature of the patented invention, its relationship to Lumos's commercial success, comparable license agreements, and the parties' competitive positions.
Preliminary Royalty Rate. On a preliminary basis, and subject to further analysis by the retained damages expert, we estimate a reasonable royalty rate of approximately 7.5% across all four asserted patents combined. This rate reflects the collective value of the asserted patent portfolio — covering waveguide coupling, germanium photodetector, laser integration, and driver circuit architecture technologies — and would be allocated among the four patents based on their respective contributions to the accused products' commercial value.
Apportionment. The driver circuit architecture addressed by the '890 Patent is one component of the overall transceiver system embodied in Lumos's accused products. Under the Federal Circuit's apportionment requirements, as articulated in VirnetX, Inc. v. Sterling Reach Holdings, 767 F.3d 1308 (Fed. Cir. 2014), and Ericsson, Inc. v. D-Link Systems, Inc., 773 F.3d 1201 (Fed. Cir. 2014), the damages analysis must apportion the royalty to the patented feature rather than the entire market value of the accused product. The driver circuit with pre-emphasis equalization is an important but not dominant component of the overall transceiver value proposition, which also includes the silicon photonic MZM itself, the photodetector receiver, the laser source or laser integration, the digital signal processor, the optical fiber coupling, and the product packaging and thermal management. Apportionment analysis will likely reduce the royalty base or rate attributable to the '890 Patent alone relative to the combined royalty rate for all four patents.
Willfulness. OWS sent a cease-and-desist letter to Lumos on March 15, 2022, referencing the '567 and '234 Patents specifically. The '890 Patent was not mentioned in the C&D letter because it had not yet issued as of the date of the letter (the '890 Patent issued on April 26, 2022, more than five weeks after the C&D letter was sent). Accordingly, willfulness allegations for the '890 Patent would begin no earlier than the filing of the complaint, when Lumos first receives notice of the '890 Patent assertions. Enhanced damages under 35 U.S.C. § 284 for willful infringement of the '890 Patent are therefore unlikely to be available for the pre-suit period and would depend on Lumos's post-filing conduct with respect to the '890 Patent.
Pre-Litigation Valuation. Clearpath IP Valuation Services, Inc. (Jennifer Armitage, lead analyst) conducted a pre-litigation valuation of the four asserted patents and assessed their collective value at $42.8 million. This valuation was prepared for purposes of the OWS Board of Directors' litigation authorization decision and reflects a probability-weighted assessment of the expected recovery from the contemplated litigation. The '890 Patent's individual contribution to the $42.8 million valuation has not yet been separately assessed but should be determined in coordination with the damages expert to ensure consistency between the pre-litigation valuation and the damages model presented at trial.
VIII. Comparison with Other Asserted Patents
This Section provides a brief cross-reference to the companion pre-suit infringement analysis memoranda prepared for the other three patents proposed for assertion against Lumos: U.S. Patent No. 10,785,567 (the "'567 Patent"), U.S. Patent No. 10,923,234 (the "'234 Patent"), and U.S. Patent No. 11,045,678 (the "'678 Paten