UNITED STATES DISTRICT COURT EASTERN DISTRICT OF TEXAS MARSHALL DIVISION
OPTIWAVE SEMICONDUCTOR CORP., Plaintiff,
v.
LUMICORE TECHNOLOGIES, INC., Defendant.
Case No. 2:24-cv-00319-JRG
Hon. James R. Gilstrap
DECLARATION OF DR. CAROLINE ASHFORD, Ph.D. IN SUPPORT OF PLAINTIFF OPTIWAVE SEMICONDUCTOR CORP.'S OPENING CLAIM CONSTRUCTION BRIEF
Filed: November 15, 2024
I, Dr. Caroline Ashford, hereby declare and state as follows:
I. INTRODUCTION AND PURPOSE
1. My name is Dr. Caroline Ashford. I am a Professor of Electrical Engineering & Photonics at the Northfield Institute of Technology ("NIT") in Evanston, Illinois, where I have been a member of the faculty since 2002. I have been retained by the law firm of Calderwood & Harkness LLP on behalf of Plaintiff Optiwave Semiconductor Corp. ("OWS" or "Plaintiff") as a technical expert in connection with this patent infringement action captioned Optiwave Semiconductor Corp. v. Lumicore Technologies, Inc., Case No. 2:24-cv-00319-JRG, pending before this Court. The purpose of this declaration is to provide the Court with my opinions regarding the ordinary and customary meaning of certain disputed claim terms in United States Patent Nos. 10,234,847 (the "'847 Patent"), 10,891,193 (the "'193 Patent"), 9,678,562 (the "'562 Patent"), and 11,402,015 (the "'015 Patent") (collectively, the "Asserted Patents"), as those terms would be understood by a person of ordinary skill in the art ("POSITA") at the time of each patent's filing. My engagement with Calderwood & Harkness LLP is governed by an engagement agreement dated August 1, 2024, and I am compensated for my work in this matter at a rate of $950 per hour. My compensation is not contingent upon the substance of my opinions, the nature of my testimony, or the outcome of this litigation or any other proceeding in which I may participate.
2. This declaration is based on my personal knowledge, my education, training, and more than twenty-five years of professional and academic experience in the field of silicon photonics and photonic integrated circuit ("PIC") design. In forming the opinions set forth herein, I have reviewed the Asserted Patents, including their specifications, claims, and drawings; the complete prosecution histories for all four Asserted Patents; relevant prior art references; technical literature; the Joint Claim Construction Statement filed on October 28, 2024; OWS's P.R. 3-1 Infringement Contentions served September 16, 2024; Lumicore Technologies, Inc.'s ("Lumicore" or "Defendant") P.R. 3-3 Invalidity Contentions served October 14, 2024; teardown reports prepared by Benchmark Semiconductor Analysis, LLC; deposition transcripts; and other materials specifically identified herein and in Exhibit B to this declaration. I am prepared to testify consistent with the opinions expressed in this declaration at the Markman hearing currently scheduled before this Court for March 14, 2025.
II. QUALIFICATIONS AND BACKGROUND
A. Educational Background
3. I received my Bachelor of Science degree in Electrical Engineering, summa cum laude, from the Northfield Institute of Technology in 1994. During my undergraduate studies, I concentrated in solid-state electronics and was elected to Tau Beta Pi and Eta Kappa Nu engineering honor societies. I received the Northfield Distinguished Undergraduate Research Award for my senior thesis on fiber-optic coupling efficiency in planar waveguide structures.
4. I received my Master of Science degree in Electrical Engineering from the Massachusetts Institute of Technology in 1996. My master's research, conducted under the supervision of Professor Harold K. Richardson, focused on photonics and optoelectronics, with particular emphasis on the design and characterization of III-V semiconductor optical amplifiers for wavelength-division multiplexed communication systems.
5. I received my Doctor of Philosophy degree in Electrical Engineering from the Massachusetts Institute of Technology in 1999. My doctoral dissertation, titled "Design, Optimization, and Fabrication of Integrated Silicon Photonic Waveguide Structures for High-Density Wavelength-Division Multiplexing," addressed the development of novel silicon photonic waveguide geometries for low-loss, high-channel-count multiplexing applications. My dissertation committee included leading researchers in the fields of integrated photonics and semiconductor device physics.
6. Following the completion of my doctoral degree, I held a post-doctoral research fellowship at the Westmark Group in Yorktown Heights, New York, from 1999 to 2002. During this fellowship, my research focused on silicon-on-insulator ("SOI") photonic circuits for telecommunications applications, including the design and experimental validation of compact ring-resonator-based wavelength filters and their integration with CMOS electronic circuits on a common silicon platform.
B. Academic and Professional Experience
7. I joined the faculty of the Northfield Institute of Technology in 2002 as an Assistant Professor of Electrical Engineering. I was promoted to Associate Professor with tenure in 2007 and to full Professor in 2012. Since 2014, I have additionally served as the Director of NIT's Silicon Photonics Research Center ("SPRC"), which is one of the leading academic research centers in the United States devoted to silicon photonic device design, fabrication, and systems integration. The SPRC maintains active collaborations with major semiconductor foundries and photonics companies and operates a state-of-the-art cleanroom facility for photonic device fabrication and characterization.
8. In my capacity as a professor at NIT, I have taught graduate and undergraduate courses in a wide range of subjects relevant to the technologies at issue in this case, including Photonic Integrated Circuits, Optical Communications Systems, Semiconductor Device Physics, Electromagnetic Theory, Waveguide Design and Simulation, Silicon Photonics Fabrication, and Advanced Topics in Optoelectronics. I have supervised the completion of over thirty (30) Ph.D. dissertations and more than fifty (50) Master of Science theses in the fields of silicon photonics, optoelectronics, and related disciplines. Many of my former graduate students hold research and engineering positions at leading companies in the silicon photonics industry, including intel, Cisco, Dunmore Industries, Marlowe & Co., and Greaves Holdings.
C. Research and Publications
9. I am the author or co-author of over 180 peer-reviewed journal articles and conference papers in the fields of silicon photonics, optical transceivers, waveguide multiplexing, thermal management of photonic integrated circuits, grating coupler design, coherent optical receiver architectures, and related subjects. My work has been published in leading technical journals, including IEEE Photonics Technology Letters, IEEE Journal of Lightwave Technology, Optics Express, Nature Photonics, Optics Letters, Journal of the Optical Society of America B, and IEEE Journal of Selected Topics in Quantum Electronics. I have been an invited speaker at numerous international conferences, including the Optical Fiber Communications Conference ("OFC"), the Conference on Lasers and Electro-Optics ("CLEO"), the IEEE Photonics Conference, and the European Conference on Optical Communication ("ECOC").
10. I hold fourteen (14) United States patents in the field of photonic integrated circuit design. These patents cover a range of technologies including silicon waveguide structures, wavelength-selective filters, grating coupler architectures, and optical modulator designs. A complete list of my patents is included in my curriculum vitae, which is attached hereto as Exhibit A.
D. Industry Experience and Consulting
11. In addition to my academic work, I have served as a technical consultant to multiple semiconductor and photonics companies on matters relating to silicon photonic integrated circuit design and optical transceiver development. My consulting engagements have involved subjects including waveguide multiplexer design, coherent optical transceiver architecture, thermal management of photonic integrated circuits, grating coupler optimization, process design kit development for silicon photonic foundries, and the integration of III-V active components with silicon photonic platforms. My consulting clients have included both established semiconductor companies and early-stage photonics startups. I maintain these consulting relationships through my role at NIT's Silicon Photonics Research Center and through individual consulting agreements.
12. I have been retained as an expert witness in eight (8) prior patent infringement matters involving photonic technologies. In five (5) of those matters, I provided testimony at deposition, at trial, or at both. The subject matter of these prior engagements has included disputes over silicon photonic transceiver designs, optical modulator architectures, wavelength-selective switching technologies, and photonic packaging methods. A list of my prior expert witness engagements, including the courts in which the matters were pending, the approximate dates of my engagement, and the general subject matter, is included in my curriculum vitae attached as Exhibit A.
E. Professional Affiliations
13. I am a Fellow of the Institute of Electrical and Electronics Engineers ("IEEE"), an honor recognizing extraordinary accomplishment in the field. I am a member of the Optical Society ("Optica," formerly the Optical Society of America) and a member of SPIE, the International Society for Optics and Photonics. I have served on the technical program committees for the Optical Fiber Communications Conference ("OFC"), the Conference on Lasers and Electro-Optics ("CLEO"), and the IEEE Photonics Conference. I have served on the editorial boards of IEEE Photonics Technology Letters and Optics Express. I was the recipient of the IEEE Photonics Society Distinguished Lecturer Award in 2018 and the NIT Kaplan Prize for Excellence in Engineering Research in 2020.
F. Materials Reviewed
14. In forming the opinions expressed in this declaration, I reviewed the following categories of materials, which are listed in full in Exhibit B attached hereto:
(a) The full text, including specifications, claims, and drawings, of U.S. Patent Nos. 10,234,847; 10,891,193; 9,678,562; and 11,402,015.
(b) The complete prosecution histories for all four Asserted Patents, including all office actions, applicant responses, amendments, declarations, and examiner interview summaries, as prosecuted by Cascade IP Advisors, LLC (lead prosecution attorney: Dr. Martin Chu). This includes the prosecution history of U.S. Provisional Application No. 62/499,117, filed April 7, 2017, which serves as the common provisional application for the '193 and '015 Patents.
(c) Related patent family documents, including the continuation relationship between the '562 and '847 Patents.
(d) Prior art references cited during prosecution and in Lumicore Technologies, Inc.'s P.R. 3-3 Invalidity Contentions (twenty-three (23) references total), including, among others: Takahashi et al., "Dense WDM Silicon Photonic MUX Using Arrayed Waveguide Grating with Optimized Phase Error Compensation" (IEEE Photonics Technology Letters, Vol. 26, No. 5, March 2014); U.S. Patent No. 8,412,007 to Bergmann ("Bergmann '007"); PCT Publication No. PCT/EP2015/071234 to Simonsen ("Simonsen PCT"); and Dr. Li Wei, "Thermal Solutions for PICs: Micro-Channel Cooling of Silicon Photonic Devices" (OFC 2013, paper OTh3B.5).
(e) Technical dictionaries, IEEE standards, textbooks, and journal articles relevant to the disputed claim terms, as specifically identified in Exhibit B and referenced throughout this declaration.
(f) The Joint Claim Construction Statement filed October 28, 2024, identifying fourteen (14) disputed claim terms, of which two (2) were subsequently agreed upon by the parties, leaving twelve (12) terms in dispute.
(g) OWS's P.R. 3-1 Infringement Contentions, served September 16, 2024.
(h) Lumicore's P.R. 3-3 Invalidity Contentions, served October 14, 2024.
(i) Benchmark Semiconductor Analysis, LLC teardown reports for the LumiLink 400G-ZR+ module (dated December 12, 2022), the LumiLink 800G-DR8 module (dated June 2023), and the LumiEdge 1600G-LR module (dated February 2024).
(j) The deposition transcript of Dr. Jian-Wei Huang, Chief Technology Officer of OWS, taken on November 5, 2024.
(k) Other documents and materials specifically referenced throughout this declaration and listed in Exhibit B.
III. DEFINITION OF A PERSON OF ORDINARY SKILL IN THE ART
15. It is my opinion that a person of ordinary skill in the art ("POSITA") relevant to the Asserted Patents, at the time of each patent's effective filing date, would have had:
(a) A Master of Science (M.S.) or Doctor of Philosophy (Ph.D.) degree in electrical engineering, photonics, optical engineering, physics, or a closely related technical field; AND
(b) At least three (3) years of professional or academic experience in the design, fabrication, testing, or development of silicon-photonic integrated circuits (ICs), including experience with one or more of the following technical areas: waveguide design and multiplexing; optical transceiver architecture; thermal management of photonic integrated circuits; or grating coupler design and optimization.
16. A person with less formal education but correspondingly more extensive practical experience in silicon photonics could also qualify as a POSITA, and conversely, a person with more advanced educational credentials but somewhat less practical experience could also qualify. For instance, a person with a Bachelor of Science degree in electrical engineering and seven or more years of relevant industry experience in silicon photonic IC design would also satisfy this definition. The precise boundary between those who qualify and those who do not is not a bright line, but the definition set forth above captures the typical level of knowledge and experience that would be brought to bear in understanding the Asserted Patents and the relevant prior art.
17. I base this definition on the nature and content of the Asserted Patents and the prior art of record. The Asserted Patents address specific and technically sophisticated challenges in silicon photonic IC design for optical communications applications. The '847 Patent is directed to low-insertion-loss waveguide multiplexing architectures that require a detailed understanding of optical waveguide theory, diffraction grating design, and wavelength-dependent propagation in integrated photonic structures. The '193 Patent is directed to high-bandwidth coherent optical transceiver integration on a silicon platform, which demands knowledge of coherent detection theory, advanced modulation formats, and the integration challenges associated with combining passive and active photonic components. The '562 Patent addresses thermal management of photonic integrated circuits using embedded micro-channel heat sinks, requiring expertise in heat transfer at the micro-scale, fluid dynamics in micro-channels, and the thermal sensitivity of photonic device performance. The '015 Patent is directed to polarization-diverse grating coupler design, which involves an understanding of diffraction theory, polarization management, and fiber-to-chip coupling techniques. The specifications of all four patents use terminology and describe design techniques that presuppose graduate-level knowledge of semiconductor fabrication processes, photonic device physics, and optical communication system design. The prior art cited during prosecution of each of these patents similarly reflects this level of skill, as it comprises published journal articles and conference papers from leading technical journals, as well as other patents disclosing detailed photonic circuit designs.
18. This POSITA definition is consistent with the level of skill that I have observed in my experience as an educator, researcher, and consultant in the silicon photonics field. The engineers and scientists who work in this area, and who would be the primary readers and users of the Asserted Patents, overwhelmingly hold graduate degrees and have several years of specialized experience. This definition is also consistent with my prior experience providing expert testimony in related patent matters.
IV. LEGAL FRAMEWORK FOR CLAIM CONSTRUCTION
19. I understand that, as a general principle, the words of a patent claim are to be given their ordinary and customary meaning as understood by a person of ordinary skill in the art at the time of the patent's effective filing date. I further understand that this ordinary and customary meaning is determined in light of the intrinsic record, which consists of the claim language itself, the patent specification (including the written description and drawings), and the prosecution history. I understand that extrinsic evidence, such as technical dictionaries, treatises, and expert testimony, may be used to assist the Court in understanding the technology and the meaning of terms as used in the art, but that such extrinsic evidence should not be used to contradict or narrow the meaning clearly established by the intrinsic record.
20. I have been advised by counsel at Calderwood & Harkness LLP regarding these legal principles and their application to claim construction. However, the opinions expressed in this declaration reflect my independent technical judgment as to how a POSITA would understand the disputed claim terms in the context of the Asserted Patents. I have not been asked by counsel to adopt any particular construction, and my opinions are based on my own analysis of the intrinsic record, the relevant technical literature, and my experience in the field.
21. I understand that the Joint Claim Construction Statement filed on October 28, 2024, initially identified fourteen (14) disputed claim terms across the four Asserted Patents. The parties have since agreed on the construction of two (2) of those terms, leaving twelve (12) claim terms in dispute. This declaration addresses all twelve (12) remaining disputed terms. I address four (4) of these terms in substantial detail below, and address the remaining eight (8) disputed terms in Section VI.E of this declaration.
V. OPINIONS ON DISPUTED CLAIM TERMS
A. "Waveguide Multiplexer" — U.S. Patent No. 10,234,847
1. Claims in Which the Term Appears.
22. The term "waveguide multiplexer" appears in Claims 1, 3, 5, 9, and 14 of U.S. Patent No. 10,234,847 (the "'847 Patent"). The '847 Patent is titled "Multi-Channel Silicon Photonic Waveguide Multiplexer with Low Insertion Loss." It was filed on September 14, 2016, and issued on March 19, 2019. The '847 Patent is a continuation of the '562 Patent. The '847 Patent generally discloses and claims silicon photonic waveguide multiplexer structures designed to combine multiple optical signals of different wavelengths onto a single output waveguide with reduced insertion loss relative to prior art designs.
23. Independent Claim 1 of the '847 Patent recites, in relevant part:
"A silicon photonic device comprising: a waveguide multiplexer formed on a silicon-on-insulator substrate, the waveguide multiplexer configured to receive a plurality of input optical signals, each input optical signal having a distinct center wavelength, and to combine the plurality of input optical signals onto a common output waveguide; …"
The term also appears in independent Claim 9 and independent Claim 14, with similar functional context, and in dependent Claims 3 and 5, which add further structural limitations.
2. The Parties' Proposed Constructions.
24. OWS proposes that "waveguide multiplexer" should be construed to mean: "An optical device that combines multiple optical signals of different wavelengths onto a single waveguide."
25. Lumicore proposes that "waveguide multiplexer" should be construed to mean: "An arrayed waveguide grating that combines optical signals using a slab coupler and phase-shifted waveguide array."
3. Dr. Ashford's Opinion.
26. It is my opinion that a POSITA would understand the term "waveguide multiplexer" as used in the '847 Patent to mean "an optical device that combines multiple optical signals of different wavelengths onto a single waveguide," consistent with OWS's proposed construction. I hold this opinion based on the claim language, the specification, the prosecution history, and the ordinary meaning of this term in the silicon photonics field, as I discuss in detail below.
27. The ordinary meaning of "waveguide multiplexer" is broad. In the silicon photonics field, the term "waveguide multiplexer" is a well-understood, generic term that refers to any integrated optical device that performs the function of wavelength-division multiplexing — that is, combining multiple optical signals, each at a different wavelength (or channel), onto a single output waveguide. A POSITA at the time of the '847 Patent's filing in September 2016 would have been familiar with multiple distinct architectures for implementing waveguide multiplexers on a silicon photonic platform. These architectures include, but are not limited to:
(a) Arrayed waveguide gratings ("AWGs"): Devices that use an array of waveguides with incrementally different path lengths, connected by slab coupler regions, to achieve wavelength-selective routing through constructive and destructive interference.
(b) Echelle gratings (also known as planar concave gratings or "PCGs"): Devices that use a single etched concave diffraction grating on a planar waveguide to disperse and combine different wavelengths.
(c) Cascaded Mach-Zehnder interferometers ("MZIs"): Tree-like structures of cascaded interferometric stages, each stage configured to route specific wavelength channels, ultimately combining them onto a single output.
(d) Ring-resonator-based filters: Configurations of micro-ring or micro-disk resonators, each tuned to a specific resonant wavelength, used to add or drop individual wavelength channels to or from a bus waveguide.
28. All of these architectures are properly characterized as "waveguide multiplexers" in the silicon photonics literature. Technical textbooks confirm this understanding. For example, Fundamentals of Silicon Photonics by Vivien and Pavesi (2d ed., Aldermere Partners LLC, 2016) describes "waveguide multiplexers" as a broad class of devices and discusses AWGs, Echelle gratings, and ring-resonator approaches as alternative implementations. Similarly, the IEEE standard glossary and technical publications use the term "multiplexer" in the optical context to refer broadly to any device that combines multiple wavelength channels onto a single output, without restricting the term to any particular structural implementation.
29. The '847 Patent specification describes multiple multiplexer architectures. The specification of the '847 Patent itself uses the term "waveguide multiplexer" broadly and discloses multiple different architectural implementations. At column 3, lines 14–28, the specification states:
"The present invention relates generally to waveguide multiplexers for silicon photonic applications. As used herein, a 'waveguide multiplexer' refers to an optical device that combines multiple optical signals of different wavelengths onto a common output waveguide. Various architectures may be employed to implement such a waveguide multiplexer, including arrayed waveguide gratings (AWGs), Echelle gratings, cascaded Mach-Zehnder interferometers (MZIs), and ring-resonator-based wavelength filters."
30. The specification then goes on to describe, in detail, particular embodiments utilizing AWG architectures (described at columns 5–8) and Echelle grating architectures (described at columns 9–11). The specification further discusses cascaded MZI and ring-resonator approaches as alternative implementations, noting their respective advantages and trade-offs in terms of channel count, insertion loss, footprint, and fabrication tolerance (columns 12–13). The specification does not state or suggest that the term "waveguide multiplexer" is limited to any one of these architectures.
31. Lumicore's construction improperly narrows the term to a single embodiment. Lumicore proposes to construe "waveguide multiplexer" to mean "an arrayed waveguide grating that combines optical signals using a slab coupler and phase-shifted waveguide array." This construction would limit the term to a single architecture — the AWG — and would exclude all other waveguide multiplexer architectures that the specification expressly discloses and that a POSITA would understand to fall within the scope of the term. This is precisely the type of impermissible importation of a preferred embodiment into the claims that courts have repeatedly rejected. See Phillips v. AWH Corp., 415 F.3d 1303, 1323 (Fed. Cir. 2005) (en banc) (holding that it is "one of the cardinal sins of patent law" to read a limitation from a preferred embodiment into the claims).
32. Claim differentiation supports OWS's construction. The claim structure of the '847 Patent provides independent confirmation that the term "waveguide multiplexer" in the independent claims is not limited to AWG architectures. Dependent Claim 5, which depends from independent Claim 1, recites: "The silicon photonic device of claim 1, wherein the waveguide multiplexer comprises an arrayed waveguide grating." Under the well-established doctrine of claim differentiation, the presence of dependent Claim 5 — which specifically narrows the type of multiplexer to an AWG — demonstrates that independent Claim 1 is not so limited. If "waveguide multiplexer" in Claim 1 already meant "an arrayed waveguide grating," then Claim 5 would be entirely redundant, which is disfavored under claim construction principles.
33. Similarly, dependent Claim 3, which also depends from Claim 1, recites: "The silicon photonic device of claim 1, wherein the waveguide multiplexer comprises an Echelle grating." The existence of this claim further confirms that "waveguide multiplexer" in Claim 1 is broad enough to encompass at least both AWG and Echelle grating architectures, and in my opinion, the full range of multiplexer architectures that a POSITA would understand the term to include.
34. If the patentee had intended to limit the claim to AWGs, it could have and would have used the specific term. The '847 Patent specification and claims demonstrate that the patentee was well aware of the specific term "arrayed waveguide grating" and used it precisely when it intended to refer to that particular architecture. The patentee's deliberate use of the broader term "waveguide multiplexer" in the independent claims, while reserving the specific term "arrayed waveguide grating" for the dependent claims, reflects a conscious drafting choice to claim broadly in the independent claims and to claim more narrowly in the dependent claims. This drafting pattern is fully consistent with standard patent claim drafting practice and should be given effect.
4. Prosecution History Analysis.
35. The prosecution history of the '847 Patent further supports OWS's broad construction and undermines Lumicore's narrow construction. During prosecution, the term "waveguide multiplexer" was present in Claim 1 as originally filed. The examiner issued a non-final office action on May 3, 2018, rejecting the claims under 35 U.S.C. § 103 based on a combination of Takahashi et al. ("Dense WDM Silicon Photonic MUX," IEEE Photonics Technology Letters, March 2014) and U.S. Patent No. 7,853,103 to Doerr. In its response to this office action, dated August 15, 2018, the applicant distinguished the prior art on the basis of specific structural and functional features of the claimed multiplexer — specifically, the low-insertion-loss design achieved through the recited input coupler geometry and waveguide tapering features — rather than on the basis of the type of multiplexer architecture. The applicant did not amend the term "waveguide multiplexer" and did not argue that the term was limited to any particular architectural type.
36. The examiner thereafter allowed the claims in a Notice of Allowance dated November 28, 2018. The examiner's reasons for allowance referenced the combination of features recited in the independent claims, including the specific input coupler geometry, the waveguide taper profile, and the low insertion loss performance characteristics. Notably, the examiner did not require the applicant to narrow the term "waveguide multiplexer" to any specific architecture, and the reasons for allowance do not suggest that the examiner understood the term to be so limited.
37. There is nothing in the prosecution history that constitutes a clear and unmistakable disavowal or disclaimer of any particular multiplexer architecture from the scope of the term "waveguide multiplexer." Lumicore's proposed construction finds no support in the prosecution history.
38. Accordingly, it is my opinion that "waveguide multiplexer" as used in the '847 Patent means "an optical device that combines multiple optical signals of different wavelengths onto a single waveguide," consistent with OWS's proposed construction.
B. "Integrated on a Silicon Substrate" — U.S. Patent No. 10,891,193
1. Claims in Which the Term Appears.
39. The term "integrated on a silicon substrate" appears in Claims 1, 3, 7, 10, 15, and 18 of U.S. Patent No. 10,891,193 (the "'193 Patent"). The '193 Patent is titled "High-Bandwidth Coherent Optical Transceiver Integrated on Silicon Substrate." It was filed on April 7, 2017, and issued on January 12, 2021. The '193 Patent claims priority to U.S. Provisional Application No. 62/499,117, filed April 7, 2017, which also serves as the priority application for the '015 Patent. The '193 Patent generally discloses and claims a coherent optical transceiver architecture in which the key photonic and electronic components are integrated on a silicon substrate to achieve high-bandwidth performance suitable for data center and telecommunications applications.
40. Independent Claim 1 of the '193 Patent recites, in relevant part:
"A coherent optical transceiver comprising: a transmitter photonic circuit and a receiver photonic circuit, each integrated on a silicon substrate, the transmitter photonic circuit comprising a tunable laser source, a plurality of optical modulators, and a multiplexer; the receiver photonic circuit comprising a polarization beam splitter, a plurality of optical hybrids, and a plurality of balanced photodetectors; …"
2. The Parties' Proposed Constructions.
41. OWS proposes that "integrated on a silicon substrate" should be construed to mean: "Formed on or within a silicon-based wafer using semiconductor fabrication processes."
42. Lumicore proposes that "integrated on a silicon substrate" should be construed to mean: "Monolithically fabricated on a single silicon die without hybrid bonding or heterogeneous integration."
3. Dr. Ashford's Opinion.
43. It is my opinion that a POSITA would understand the term "integrated on a silicon substrate" as used in the '193 Patent to mean "formed on or within a silicon-based wafer using semiconductor fabrication processes," consistent with OWS's proposed construction. This construction encompasses all forms of integration on a silicon-based platform, including both monolithic integration (in which all components are fabricated directly on the silicon wafer using a single process flow) and heterogeneous integration (in which components made of different materials, such as III-V semiconductor gain media, are bonded to or otherwise incorporated onto the silicon platform as part of a unified photonic circuit). I explain my reasons for this opinion below.
44. The ordinary meaning of "integrated on" is broad. The phrase "integrated on a silicon substrate" would be understood by a POSITA as a general description of the physical relationship between the photonic components and the underlying silicon platform. The word "integrated" in the context of semiconductor and photonic circuit technology broadly refers to the incorporation of multiple functional components onto a common substrate as part of a unified device or system. The phrase "on a silicon substrate" identifies the substrate material. Together, the phrase conveys that the described components are formed on or within a silicon-based wafer — not that they are formed exclusively through monolithic silicon processing. The term "integrated on" is plainly broader than "monolithically fabricated on," which is the specific term that would be used if the patentee intended to restrict the claim to purely monolithic processes.
45. The '193 Patent specification describes both monolithic and heterogeneous integration. The specification of the '193 Patent is explicit that the claimed transceiver may be implemented using either monolithic or heterogeneous integration approaches. At column 4, lines 32–45, the specification states:
"In one embodiment, the transmitter photonic circuit is integrated on a silicon substrate using a monolithic CMOS-compatible process in which all photonic components, including the optical modulators and passive waveguide structures, are fabricated directly on a silicon-on-insulator (SOI) wafer. In another preferred embodiment, the tunable laser source comprises an InP-based gain medium that is heterogeneously integrated onto the silicon substrate using wafer bonding techniques. This heterogeneous integration approach enables the incorporation of high-performance III-V gain materials onto the silicon photonic platform while maintaining compatibility with standard silicon fabrication processes for the remaining photonic components."
46. At column 5, lines 8–19, the specification further states:
"As used herein, the term 'integrated on a silicon substrate' encompasses any fabrication approach in which the described photonic components are formed on or attached to a silicon-based wafer as part of a unified photonic circuit, including but not limited to monolithic silicon processing, heterogeneous bonding of III-V materials, micro-transfer printing of chiplets, and flip-chip attachment of discrete photonic components to a silicon interposer."
47. This explicit definitional language in the specification directly addresses the scope of the term "integrated on a silicon substrate" and confirms that the term is not limited to monolithic fabrication. Under well-established claim construction principles, when a patentee acts as its own lexicographer and provides a clear definition of a claim term in the specification, that definition controls. Here, the specification unambiguously defines "integrated on a silicon substrate" to encompass heterogeneous integration, and Lumicore's proposed construction — which would exclude heterogeneous integration — directly contradicts this specification language.
48. Heterogeneous integration was a widely practiced and commercially important technique at the time of filing. As of the '193 Patent's filing date in April 2017, heterogeneous integration of III-V semiconductor materials onto silicon photonic platforms was a well-established and commercially important approach in the silicon photonics field. Multiple companies, including Intel, Greaves Holdings (formerly Crestline Corporation), and HPE, had developed commercial products using heterogeneous integration techniques. The technical literature from the 2015–2017 period extensively describes heterogeneous integration as a standard method for achieving the integration of laser sources and optical amplifiers onto silicon substrates. Notable publications include Liang & Bowers, "Recent Progress in Heterogeneous III-V-on-Silicon Photonic Integration" (Light: Science & Applications, Vol. 4, 2015), and Komljenovic et al., "Heterogeneous Silicon Photonic Integrated Circuits" (Journal of Lightwave Technology, Vol. 34, No. 1, January 2016). A POSITA at the time of filing would have understood heterogeneous integration to be a standard form of "integrating" photonic components "on a silicon substrate."
49. Lumicore's construction would exclude a preferred embodiment. Lumicore's proposed construction requires "monolithically fabricated on a single silicon die without hybrid bonding or heterogeneous integration." As discussed above, the specification describes the heterogeneously integrated tunable laser source as "another preferred embodiment" of the claimed transceiver. A claim construction that excludes a preferred embodiment disclosed in the specification is strongly disfavored under Federal Circuit precedent. See On-Line Techs., Inc. v. Bodenseewerk Perkin-Elmer GmbH, 386 F.3d 1133, 1138 (Fed. Cir. 2004) ("A claim interpretation that excludes a preferred embodiment from the scope of the claim is rarely, if ever, correct."). Lumicore's proposed construction would have exactly this effect, and for that reason alone, it should be rejected.
4. Prosecution History Analysis.
50. The prosecution history of the '193 Patent confirms the breadth of the term "integrated on a silicon substrate" and provides no basis for the narrow construction proposed by Lumicore. The term appeared in Claim 1 as originally filed. During prosecution, the examiner issued a non-final office action on March 12, 2020, rejecting the claims under 35 U.S.C. § 102(a)(1) based on U.S. Patent No. 9,337,933 to Doerr et al. In responding to this rejection on June 22, 2020, the applicant distinguished Doerr on the basis of specific transceiver architecture features — namely, the recited arrangement of the polarization beam splitter, optical hybrids, and balanced photodetectors in the receiver circuit, and the specific relationship between the multiplexer and the tunable laser source in the transmitter circuit — rather than on the basis of the integration method. The applicant did not amend the term "integrated on a silicon substrate" and did not argue that the term should be understood to exclude heterogeneous integration or any other particular integration technique.
51. In the applicant's arguments to the examiner, the applicant stated: "The claimed coherent optical transceiver, with the specific arrangement of photonic components integrated on a silicon substrate as recited in Claim 1, is not anticipated by Doerr, which discloses a different transceiver architecture lacking the specific combination of components and their functional interrelationships as claimed." This argument treats the "integrated on a silicon substrate" limitation as a broad platform requirement and does not equate it with any particular integration methodology.
52. There is no amendment to this term, and no argument made during prosecution, that could constitute a clear and unmistakable disclaimer of heterogeneous integration or any other form of integration on a silicon substrate. Lumicore's proposed construction is contrary to the specification's explicit definition and is unsupported by the prosecution history.
53. Accordingly, it is my opinion that "integrated on a silicon substrate" as used in the '193 Patent means "formed on or within a silicon-based wafer using semiconductor fabrication processes," consistent with OWS's proposed construction.
C. "Micro-Channel Heat Sink" — U.S. Patent No. 9,678,562
1. Claims in Which the Term Appears.
54. The term "micro-channel heat sink" appears in Claims 1, 4, 6, and 11 of U.S. Patent No. 9,678,562 (the "'562 Patent"). The '562 Patent is titled "Method for Thermal Management of Photonic Integrated Circuits Using Embedded Micro-Channel Heat Sinks." It was filed on November 22, 2014, and issued on June 13, 2017. The '562 Patent was originally assigned to Solara Optics, Inc. and was subsequently acquired by OWS pursuant to an Asset Purchase Agreement dated June 15, 2018, under which OWS acquired the '562 Patent along with eleven (11) other patents for a total purchase price of $34.5 million. The '562 Patent is in the same patent family as the '847 Patent, which is a continuation of the '562 Patent.
55. Independent Claim 1 of the '562 Patent recites, in relevant part:
"A method for thermally managing a photonic integrated circuit, comprising: providing a photonic integrated circuit comprising a plurality of photonic devices formed on a substrate; forming a micro-channel heat sink embedded within or adjacent to the substrate, the micro-channel heat sink comprising a plurality of micro-channels configured to transfer heat from the plurality of photonic devices; …"
2. The Parties' Proposed Constructions.
56. OWS proposes that "micro-channel heat sink" should be construed to mean: "A heat-dissipating structure containing channels with a hydraulic diameter of less than 1 mm."
57. Lumicore proposes that "micro-channel heat sink" should be construed to mean: "A closed-loop liquid-cooling system with channels having a hydraulic diameter between 10 µm and 200 µm."
3. Dr. Ashford's Opinion.
58. It is my opinion that a POSITA would understand the term "micro-channel heat sink" as used in the '562 Patent to mean "a heat-dissipating structure containing channels with a hydraulic diameter of less than 1 mm," consistent with OWS's proposed construction. I hold this opinion based on the claim language, the specification, the prosecution history, the established technical literature on micro-channel thermal management, and the ordinary meaning of the term in the relevant art, as discussed below.
59. Lumicore's construction is unduly narrow in two independent respects. Lumicore proposes to construe "micro-channel heat sink" in a way that imposes two limitations not found in the claims: (a) it limits the term to "closed-loop liquid-cooling" systems, thereby excluding passive and single-phase convective cooling approaches that use micro-channels; and (b) it imposes a specific dimensional range of 10 µm to 200 µm for the hydraulic diameter of the channels, which is narrower than both the specification's disclosure and the established technical definition of "micro-channel." I address each of these issues in turn.
60. The term is not limited to closed-loop liquid-cooling systems. Lumicore's construction requires that the micro-channel heat sink be a "closed-loop liquid-cooling system." This limitation is not found in the claims, which simply recite a "micro-channel heat sink" without specifying the type of cooling medium or the system configuration. The '562 Patent specification describes multiple embodiments of micro-channel heat sinks, including embodiments that use liquid coolants in a closed-loop configuration (column 7, lines 22–40), embodiments that use single-phase liquid cooling in an open-loop configuration (column 8, lines 5–18), and embodiments that use gas-phase or air cooling through micro-channel structures (column 9, lines 1–15). Regarding the gas-phase cooling embodiment, the specification states:
"In another embodiment, the micro-channel heat sink operates using forced air convection through the micro-channel structures. While liquid-cooled embodiments may offer superior heat removal rates, air-cooled micro-channel heat sinks provide advantages in terms of system simplicity, reduced risk of leakage, and compatibility with environments where liquid coolants are undesirable."
61. By expressly disclosing air-cooled micro-channel heat sinks as an embodiment of the invention, the specification confirms that the term "micro-channel heat sink" is not limited to liquid-cooling systems, much less to closed-loop liquid-cooling systems. Lumicore's construction would improperly exclude the air-cooled embodiments that the specification expressly describes. This is another instance of the impermissible importation of limitations from a preferred embodiment into the claims.
62. The dimensional limitation proposed by Lumicore is not supported. Lumicore proposes that the channels must have a "hydraulic diameter between 10 µm and 200 µm." This specific range finds no support in the claims, the specification's definitional language, or the established technical literature.
63. The claims of the '562 Patent use the term "micro-channel" without specifying any numerical dimensional limitation. The specification provides guidance on the meaning of "micro-channel" at column 5, lines 10–18:
"As used herein, a 'micro-channel' refers to a fluid-flow channel having a hydraulic diameter in the micro-scale range, typically less than 1 mm (1,000 µm). The micro-channels described herein may have hydraulic diameters ranging from approximately 50 µm to approximately 500 µm, depending on the specific thermal requirements, fabrication constraints, and performance objectives of the photonic integrated circuit."
64. This specification language establishes two important points. First, the general definition of "micro-channel" is "a fluid-flow channel having a hydraulic diameter in the micro-scale range, typically less than 1 mm." This is the definitional statement, and it establishes the upper boundary of the micro-channel regime at 1 mm (1,000 µm), consistent with OWS's proposed construction. Second, the specification describes specific embodiments with hydraulic diameters "ranging from approximately 50 µm to approximately 500 µm." This is an embodiment-specific range, not a definitional limitation. The use of the phrases "may have" and "depending on" confirms that this range is exemplary, not limiting.
65. Lumicore's proposed range of 10 µm to 200 µm does not even correspond to the embodiment range described in the specification (50 µm to 500 µm). It appears to be derived from a subset of the specific examples described in the patent's detailed description, where certain particularly compact embodiments are described as having channels with hydraulic diameters of 50 µm, 100 µm, and 150 µm, with a theoretical lower limit of approximately 10 µm noted as achievable with advanced lithographic techniques. The 200 µm upper bound proposed by Lumicore has no basis in any definitional language in the specification and appears to be an arbitrary cutoff.
66. The established technical literature supports OWS's construction. The definition of "micro-channel" in the thermal management field has been well-established since the seminal work of Tuckerman and Pease, "High-Performance Heat Sinking for VLSI" (IEEE Electron Device Letters, Vol. 2, No. 5, May 1981). The Tuckerman and Pease framework, which is universally cited in the micro-channel cooling literature, defines micro-channels as channels with hydraulic diameters below 1 mm. This definition has been widely adopted in subsequent publications, textbooks, and engineering handbooks, including Kandlikar & Grande, "Heat Transfer and Fluid Flow in Minichannels and Microchannels" (Ashford Industries, 2006), which defines micro-channels as having hydraulic diameters in the range of 10 µm to 1 mm. The lower bound in the Kandlikar framework reflects the practical manufacturing limit for channels at the time of publication, not a definitional requirement of the term "micro-channel." A POSITA at the time of the '562 Patent's filing in November 2014 would have understood "micro-channel" to encompass channels with hydraulic diameters below 1 mm, consistent with OWS's proposed construction and the specification's own definitional language.
67. Lumicore's construction improperly imports limitations from preferred embodiments. To summarize, Lumicore's proposed construction of "micro-channel heat sink" is unduly narrow because it (a) excludes non-liquid-cooled micro-channel heat sinks that the specification expressly discloses, and (b) imposes a dimensional range (10 µm to 200 µm) that is inconsistent with the specification's own definitional language (less than 1 mm) and with the established technical literature. Both of these narrowing limitations represent impermissible importations of features from specific embodiments into the claims.
4. Prosecution History Analysis.
68. The prosecution history of the '562 Patent provides no support for Lumicore's narrow construction and is fully consistent with OWS's broad construction. During prosecution, the examiner initially rejected the claims in a non-final office action dated July 8, 2016, under 35 U.S.C. § 103 based on Dr. Li Wei, "Thermal Solutions for PICs: Micro-Channel Cooling of Silicon Photonic Devices" (OFC 2013, paper OTh3B.5). The examiner asserted that Wei disclosed a micro-channel cooling structure for photonic integrated circuits that rendered the claims obvious.
69. In responding to this rejection on October 17, 2016, the applicant distinguished Wei on the basis that Wei's micro-channel cooling structure was applied as an external, top-mounted heat spreader, whereas the claims of the '562 Patent require the micro-channel heat sink to be "embedded within or adjacent to the substrate" of the photonic integrated circuit itself. The applicant argued that the embedded configuration, as claimed, provided superior thermal contact with the photonic devices and enabled more efficient heat removal compared to Wei's external approach. Critically, the applicant's arguments for patentability were based entirely on the structural relationship between the micro-channel heat sink and the photonic integrated circuit (i.e., the embedded configuration), not on the dimensions of the channels or on whether the cooling mechanism involved liquid versus gas-phase cooling.
70. No amendment was made to the term "micro-channel heat sink" during prosecution. The applicant's arguments during prosecution consistently referred to the broad category of micro-channel structures without imposing any dimensional or coolant-type limitations. There is no clear and unmistakable disclaimer in the prosecution history that would support Lumicore's proposed narrow construction.
71. Accordingly, it is my opinion that "micro-channel heat sink" as used in the '562 Patent means "a heat-dissipating structure containing channels with a hydraulic diameter of less than 1 mm," consistent with OWS's proposed construction.
D. "Polarization-Diverse Grating Coupler" — U.S. Patent No. 11,402,015
1. Claims in Which the Term Appears.
72. The term "polarization-diverse grating coupler" appears in Claims 1, 5, 8, 12, and 16 of U.S. Patent No. 11,402,015 (the "'015 Patent"). The '015 Patent is titled "Polarization-Diverse Grating Coupler for Silicon Photonic Transceivers." It was filed on August 30, 2019, and issued on August 2, 2022. The '015 Patent claims priority to U.S. Provisional Application No. 62/499,117, filed April 7, 2017, which is the same provisional application to which the '193 Patent claims priority. The '015 Patent generally discloses and claims grating coupler structures for silicon photonic transceivers that are capable of coupling light in two orthogonal polarization states from an optical fiber into on-chip waveguides.
73. Independent Claim 1 of the '015 Patent recites, in relevant part:
"A silicon photonic transceiver comprising: an optical interface configured to receive light from an optical fiber; a polarization-diverse grating coupler optically coupled to the optical interface, the polarization-diverse grating coupler configured to couple the received light into one or more on-chip waveguides; …"
2. The Parties' Proposed Constructions.
74. OWS proposes that "polarization-diverse grating coupler" should be construed to mean: "A grating coupler capable of coupling light of two orthogonal polarization states."
75. Lumicore proposes that "polarization-diverse grating coupler" should be construed to mean: "A two-dimensional grating coupler with a polarization-splitting element that simultaneously couples TE and TM modes."
3. Dr. Ashford's Opinion.
76. It is my opinion that a POSITA would understand the term "polarization-diverse grating coupler" as used in the '015 Patent to mean "a grating coupler capable of coupling light of two orthogonal polarization states," consistent with OWS's proposed construction. I hold this opinion based on the claim language, the specification, the prosecution history, and the ordinary meaning of this term in the silicon photonics field, as discussed below.
77. Lumicore's construction is improperly narrow in two respects. Lumicore's proposed construction imposes two structural limitations that are not present in the claims: (a) it requires the grating coupler to be a "two-dimensional" grating structure; and (b) it requires the grating coupler to include a "polarization-splitting element" that "simultaneously couples TE and TM modes." Neither limitation is warranted by the claim language, the specification, or the prosecution history.
78. The specification describes multiple implementations of polarization-diverse grating couplers. The '015 Patent specification describes several distinct approaches to achieving polarization diversity in grating coupler designs for silicon photonic transceivers. These include:
(a) Two-dimensional (2D) grating couplers that inherently handle both TE (transverse electric) and TM (transverse magnetic) polarization states by virtue of their two-dimensional periodic grating structure. In this approach, the 2D grating itself functions as both the grating coupler and the polarization splitter, simultaneously coupling the two orthogonal polarizations into two separate on-chip waveguides. (Described at columns 4–6 of the '015 Patent.)
(b) One-dimensional (1D) grating couplers combined with a separate polarization rotator and splitter. In this approach, a conventional 1D grating coupler couples light into a single on-chip waveguide, and a downstream polarization rotator-splitter circuit then separates and processes the two polarization components. (Described at columns 7–8 of the '015 Patent.)
(c) Sub-wavelength grating (SWG) designs that use sub-wavelength structural features to modify the effective index of the grating in a polarization-dependent manner, achieving polarization diversity through the grating design itself. (Described at columns 9–10 of the '015 Patent.)
79. All three of these approaches achieve the functional objective of coupling light of two orthogonal polarization states from a fiber into the on-chip waveguide system. They are all described in the specification as embodiments of a "polarization-diverse grating coupler." Lumicore's proposed construction would limit the term to only the first of these approaches — the 2D grating coupler — and would exclude the 1D-plus-rotator/splitter approach and the sub-wavelength grating approach, both of which the specification expressly discloses. This is an impermissible narrowing of the claim scope.
80. The term "polarization-diverse" is a functional descriptor, not a structural one. The term "polarization-diverse" in the silicon photonics field refers to the functional capability of a device or system to handle light in multiple polarization states. A "polarization-diverse" grating coupler is one that is capable of coupling light regardless of its polarization state — that is, it provides diversity with respect to polarization. This functional meaning is well-established in the technical literature. For example, Taillaert et al., "A Compact Two-Dimensional Grating Coupler Used as a Polarization Splitter" (IEEE Photonics Technology Letters, Vol. 15, No. 9, September 2003), uses "polarization diversity" to describe the general concept of handling multiple polarizations, while recognizing that multiple structural implementations can achieve this objective. Similarly, the review article by Cheng et al., "Recent Advances in Silicon Photonic Grating Couplers" (Optics Express, Vol. 23, 2015), describes "polarization-diverse grating couplers" as a category of devices and discusses both 2D grating-based and 1D-plus-rotator approaches as falling within this category.
81. Lumicore's construction replaces this functional meaning with a specific structural requirement — a "two-dimensional grating coupler with a polarization-splitting element" — that does not reflect the ordinary understanding of a POSITA. The claims use the functional term "polarization-diverse," not the structural term "two-dimensional," and a POSITA would not understand the former to require the latter.
82. Claim differentiation supports OWS's construction. The claim structure of the '015 Patent provides strong support for OWS's broad construction. Dependent Claim 5, which depends from independent Claim 1, recites: "The silicon photonic transceiver of claim 1, wherein the polarization-diverse grating coupler comprises a two-dimensional periodic grating structure." The presence of this dependent claim, which expressly adds the "two-dimensional" limitation, demonstrates by claim differentiation that independent Claim 1 is not limited to two-dimensional grating structures. If "polarization-diverse grating coupler" in Claim 1 already required a two-dimensional grating, Claim 5 would be entirely redundant. The doctrine of claim differentiation creates a presumption that each claim has a different scope, and this presumption is particularly strong when, as here, the limitation at issue is the sole distinction between the independent and dependent claims. See Phillips, 415 F.3d at 1315.
83. Lumicore's requirement of "simultaneous" coupling of TE and TM modes is also unsupported. Lumicore's construction further requires that the grating coupler "simultaneously couples TE and TM modes." This "simultaneous" limitation is not recited in any of the independent claims and reflects only one of the operational modes of the 2D grating coupler embodiment. The 1D-plus-rotator/splitter embodiment, by contrast, may couple the two polarization states sequentially or through separate processing stages. The claim language does not impose any temporal requirement on the coupling process, and a POSITA would not read such a requirement into the term "polarization-diverse grating coupler."
4. Prosecution History Analysis.
84. The prosecution history of the '015 Patent does not support Lumicore's narrow construction and does not contain any clear and unmistakable disclaimer that would restrict the scope of the term "polarization-diverse grating coupler" as used in the independent claims.
85. During prosecution, the examiner rejected certain claims under 35 U.S.C. § 103 in a non-final office action dated January 14, 2022, based on a combination of U.S. Patent No. 8,412,007 to Bergmann ("Bergmann '007") and PCT Publication No. PCT/EP2015/071234 to Simonsen ("Simonsen PCT"). In response, the applicant made a narrowing amendment to dependent Claim 12, adding the limitation "wherein the polarization-diverse grating coupler comprises a two-dimensional sub-wavelength grating with a period of less than 400 nm." This amendment was made specifically to distinguish Claim 12 from the cited combination of references, which did not disclose sub-wavelength grating features with the recited periodicity.
86. Critically, the amendment to Claim 12 was specific to that dependent claim and does not affect the construction of the broader term "polarization-diverse grating coupler" as used in independent Claim 1 or in any other independent claim. The applicant did not amend the term "polarization-diverse grating coupler" in any independent claim. The applicant did not argue that the term "polarization-diverse grating coupler" is limited to two-dimensional grating couplers. To the contrary, the applicant's arguments distinguished the prior art on the basis of the specific sub-wavelength grating periodicity limitation added to Claim 12, not on the basis of any inherent structural requirement of the term "polarization-diverse grating coupler."
87. The amendment to Claim 12