EXHIBIT B
Filed in connection with the Original Complaint, Docket Entry No. 1 Case No. 2:24-cv-00319-JRG United States District Court for the Eastern District of Texas, marshall Division Optiwave Semiconductor Corp. v. Lumicore Technologies, Inc. Filed: April 22, 2024
Counsel of Record: Calderwood & Harkness LLP (Alan Ngo, Marcus Delgado, Wendy Schultz, Omar Siddiqui); Whitmore & Callahan LLP (James Callahan, local counsel)
UNITED STATES PATENT
(54) HIGH-BANDWIDTH Coherent OPTICAL TRANSCEIVER INTEGRATED ON SILICON SUBSTRATE
(75) Inventor(s):
Jian-Wei Huang, Santa Clara, CA (US); Nikolai Petrov, Santa Clara, CA (US)
(73) Assignee:
Optiwave Semiconductor Corp., Santa Clara, CA (US)
( * ) Notice:
Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. § 154(b) by 0 days.
(21) Appl. No.:
15/482,937
(22) Filed:
April 7, 2017
(65) Prior Publication Data:
US 2018/0123456 A1 — Published May 3, 2018
(60) Related U.S. Application Data:
Provisional application No. 62/499,117, filed on April 7, 2017.
(51) Int. Cl.:
H04B 10/40 (2013.01); H04B 10/61 (2013.01); G02B 6/12 (2006.01); H01S 5/02 (2006.01)
(52) U.S. Cl.:
CPC: H04B 10/40 (2013.01); H04B 10/61 (2013.01); H04B 10/6151 (2013.01); G02B 6/12004 (2013.01); G02B 6/12007 (2013.01); H01S 5/0215 (2013.01); H04J 14/02 (2013.01)
USPC: 398/135; 398/140; 398/152; 385/14; 372/50.1
(58) Field of Classification Search:
CPC: H04B 10/40; H04B 10/61; H04B 10/6151; G02B 6/12004; G02B 6/12007; H01S 5/0215; H04J 14/02
USPC: 398/135, 140, 152; 385/14; 372/50.1
See application file for complete search history.
(56) References Cited
U.S. PATENT DOCUMENTS
\* cited by examiner
FOREIGN PATENT DOCUMENTS
OTHER PUBLICATIONS. Takahashi et al., "Dense WDM Silicon Photonic Multiplexer with Integrated Coherent Receiver Front End," IEEE Photonics Technology Letters, Vol. 26, No. 5, pp. 473–476, March 1, 2014.
Dr. Li Wei, "Thermal Management Solutions for Photonic Integrated Circuits in High-Density Packaging Environments," Optical Fiber Communication Conference (OFC), Paper OTh4B.3, Anaheim, CA, March 2013.
Dong et al., "Silicon Photonic Devices and Integrated Circuits," Nanophotonics, Vol. 3, Nos. 4–5, pp. 215–228, August 2014.
Doerr et al., "Silicon Photonics Coherent Transceiver in a Ball-Grid-Array Package," Optical Fiber Communication Conference (OFC), Paper Th5D.5, Los Angeles, CA, March 2015.
Absil et al., "Imec iSiPP25G Silicon Photonics: A Robust CMOS-Based Photonics Technology Platform," Proceedings of SPIE, Vol. 9367, San Francisco, CA, February 2015.
Sacher et al., "Monolithically Integrated Multilayer Silicon Nitride-on-Silicon Waveguide Platforms for 3-D Photonic Circuits and Devices," Proceedings of the IEEE, Vol. 106, No. 12, pp. 2232–2245, December 2018.
Milivojevic et al., "112 Gb/s DP-QPSK Transmission over 2427 km SSMF Using Small-Size Silicon Photonic IQ Modulator and Low-Power CMOS Driver," Optical Fiber Communication Conference (OFC), Paper OTh1H.4, Anaheim, CA, March 2013.
Sun et al., "A 45 nm CMOS-SOI Monolithic Photonics Platform with Bit-Statistics-Based Resonant Microring Thermal Tuning," IEEE Journal of Solid-State Circuits, Vol. 51, No. 4, pp. 893–907, April 2016.
Primary Examiner:
Michael R. Hennessey
Assistant Examiner:
Sandra L. Kowalski
(74) Attorney, Agent, or Firm:
Cascade IP Advisors, LLC; Dr. Martin Chu; 1550 Crystal Drive, Suite 600, Arlington, VA 22202
(57) ABSTRACT
A high-bandwidth coherent optical transceiver integrated on a silicon substrate is disclosed. The transceiver comprises a coherent detection module, a modulator array, a local oscillator laser interface, and digital signal processing circuitry, all monolithically or heterogeneously integrated on a silicon photonic platform. The coherent detection module includes polarization-diverse optical hybrids and balanced photodetectors configured for demodulating phase- and amplitude-modulated optical signals by recovering both in-phase and quadrature components of each orthogonal polarization. The modulator array employs carrier-depletion-type silicon Mach-Zehnder modulators with traveling-wave electrode design to achieve high electro-optic bandwidth suitable for advanced modulation formats. The transceiver is configured to support multi-channel wavelength-division-multiplexed coherent transmission at data rates of 400 gigabits per second and above per channel. The silicon substrate integration enables a reduced form factor, lower power consumption, and compatibility with standard complementary metal-oxide-semiconductor fabrication processes, facilitating wafer-scale manufacturing and deployment in pluggable transceiver modules for data-center interconnect and telecommunications applications.
22 Claims, 10 Drawing Sheets
US 10,891,193 B2
SPECIFICATION
HIGH-BANDWIDTH COHERENT OPTICAL TRANSCEIVER INTEGRATED ON SILICON SUBSTRATE
TECHNICAL FIELD
The present invention relates generally to the field of coherent optical transceivers for high-bandwidth data communications. More particularly, the present invention relates to the integration of coherent optical transceiver components—including coherent detection, modulation, local oscillator interfacing, and digital signal processing elements—on a silicon photonic substrate for use in data-center interconnects, metropolitan-area networks, and long-haul telecommunications networks. The invention is especially relevant to silicon photonics chipsets designed for hyperscale data-center applications, where high port density, low power consumption, and cost-effective wafer-scale manufacturing are critical requirements.
The technical field of the invention encompasses the design, fabrication, and packaging of photonic integrated circuits (PICs) that leverage silicon-on-insulator (SOI) wafer platforms and complementary metal-oxide-semiconductor (CMOS) fabrication infrastructure to realize complete coherent optical transceiver functionality on a single photonic chip. The invention further relates to the integration of III-V semiconductor materials with silicon photonic platforms through heterogeneous integration techniques, including hybrid bonding and micro-transfer printing, for the purpose of incorporating laser gain media and other active optical components that are not natively available in silicon.
BACKGROUND OF THE INVENTION
The explosive growth of cloud computing, artificial intelligence and machine learning workloads, streaming video services, and other data-intensive applications has driven an unprecedented demand for bandwidth in data-center interconnect networks and telecommunications infrastructure. Traffic volumes within and between hyperscale data centers have been increasing at compound annual growth rates exceeding forty percent, creating urgent requirements for optical transceiver technologies that can deliver higher data rates, greater spectral efficiency, and longer transmission reach while maintaining or reducing cost per bit and power consumption per bit.
Coherent optical transmission technology has emerged as superior to direct-detect methods for achieving the combination of higher spectral efficiency and longer reach required by modern networks. In coherent transmission, both the amplitude and the phase of the optical carrier are used to encode information, enabling advanced modulation formats such as dual-polarization quadrature phase-shift keying (DP-QPSK) and dual-polarization 16-quadrature amplitude modulation (DP-16QAM). These modulation formats can achieve spectral efficiencies of four to eight bits per symbol per polarization, respectively, compared to one bit per symbol for simple on-off keying used in direct-detect systems. Additionally, coherent receivers inherently provide the ability to compensate for transmission impairments such as chromatic dispersion and polarization-mode dispersion through digital signal processing, thereby eliminating the need for optical dispersion compensation modules and enabling flexible, software-defined optical networking.
Conventional coherent optical transceivers have been implemented using discrete indium phosphide (InP)-based components. In these conventional designs, separate laser chips, modulator chips, and receiver chips—each fabricated on InP or related III-V semiconductor substrates—are assembled onto a multi-chip module using precision die-bonding and wire-bonding techniques. The laser chip typically provides a narrow-linewidth continuous-wave optical source, the modulator chip incorporates lithium niobate or InP-based Mach-Zehnder modulators for coherent modulation, and the receiver chip includes InP-based photodetectors for coherent detection.
While these conventional InP-based coherent transceivers have been successfully deployed in long-haul telecommunications networks, they suffer from several significant limitations. First, the cost of InP-based components is high due to the small wafer sizes (typically two to four inches in diameter) and low manufacturing yields characteristic of III-V semiconductor fabrication. Second, the multi-chip assembly process is complex and labor-intensive, requiring precise alignment of multiple discrete components on a common substrate, which further increases manufacturing cost and limits production scalability. Third, the resulting transceiver modules have large footprints and high power consumption, making them unsuitable for deployment in the dense, high-port-count switching architectures used in modern hyperscale data centers. Fourth, thermal management of the assembled multi-chip module presents significant challenges, as the discrete components generate heat at multiple spatially separated locations within the module, complicating heat sinking and temperature stabilization.
Silicon photonics has emerged as an enabling platform for addressing these limitations. Silicon photonics leverages the mature CMOS fabrication infrastructure developed over decades by the semiconductor industry, enabling the manufacture of photonic integrated circuits on large-diameter silicon wafers (eight inches or twelve inches in diameter) using high-volume, low-cost lithographic processes. The silicon-on-insulator (SOI) material platform provides an excellent waveguide medium at telecommunications wavelengths (centered around 1550 nm) due to the high refractive-index contrast between the silicon core and the silicon dioxide cladding, enabling tight optical mode confinement and small waveguide bend radii. This high refractive-index contrast allows for compact photonic circuit layouts with small device footprints.
Silicon photonics also enables the monolithic integration of passive optical components—such as waveguides, power splitters, wavelength multiplexers/demultiplexers, and grating couplers—with active optical components such as carrier-depletion-type silicon modulators and germanium photodetectors on a single silicon die. The ability to integrate multiple optical functions on a single chip significantly reduces component count, eliminates inter-chip optical coupling losses, and simplifies packaging.
Despite these advantages, prior attempts to integrate a complete coherent optical transceiver on a silicon photonic substrate have encountered significant technical challenges. In particular, prior-art silicon photonic coherent transceivers suffered from insufficient electro-optic bandwidth in the modulator section, limiting achievable symbol rates and hence channel data rates. Prior designs also exhibited poor signal quality due to polarization-dependent loss arising from imperfect polarization management in the silicon waveguide platform, which degrades the performance of the coherent detection process that relies on precise handling of both orthogonal polarization states of the incoming optical signal. Additionally, prior-art integrated coherent transceivers demonstrated inadequate thermal performance, with temperature-induced wavelength drift and performance instability under the high power densities characteristic of densely integrated photonic circuits.
As of the priority date of the present invention (April 7, 2017), no commercially available silicon-photonic coherent transceiver had achieved 400 gigabits per second per channel with adequate performance metrics—including sufficiently low bit-error rate, acceptable optical signal-to-noise ratio sensitivity, and stable operation across the required temperature range—to enable practical deployment in data-center interconnect and telecommunications applications. The present invention addresses these deficiencies and provides an integrated coherent optical transceiver on a silicon substrate that achieves the requisite performance, form factor, and power consumption characteristics for commercial deployment.
SUMMARY OF THE INVENTION
In accordance with embodiments of the present invention, a high-bandwidth coherent optical transceiver integrated on a silicon substrate is provided. The integrated coherent optical transceiver of the present invention addresses the shortcomings of the prior art through several key innovations.
First, the present invention provides a coherent detection module with integrated polarization-diverse optical hybrids that enables recovery of both amplitude and phase information from an incoming optical signal in both orthogonal polarization states. The coherent detection module achieves low polarization-dependent loss through carefully designed waveguide geometries and controlled fabrication processes, overcoming a key limitation of prior-art silicon photonic coherent receivers.
Second, the present invention provides a silicon-based modulator array incorporating a traveling-wave electrode design that achieves high electro-optic bandwidth exceeding 40 GHz, enabling symbol rates of 64 GBaud and above. The modulator array employs carrier-depletion-type silicon Mach-Zehnder modulators arranged in a nested configuration suitable for generating advanced modulation formats including DP-QPSK and DP-16QAM.
Third, the present invention provides an on-chip local oscillator interface with hybrid laser integration, enabling the coupling of a narrow-linewidth III-V semiconductor laser to the silicon photonic chip through techniques including hybrid bonding, edge coupling, and micro-transfer printing. The local oscillator interface provides stable, low-noise optical reference signals essential for coherent detection.
Fourth, the present invention provides integrated digital signal processing (DSP) functionality for signal recovery, including chromatic dispersion compensation, polarization demultiplexing, carrier frequency and phase recovery, and forward error correction. The DSP may be implemented in a co-packaged application-specific integrated circuit (ASIC) or monolithically integrated on the same silicon substrate.
Fifth, the present invention incorporates thermal management features for stable operation of the integrated transceiver under the power densities and operating conditions characteristic of pluggable transceiver modules deployed in data-center environments.
The coherent optical transceiver of the present invention supports data rates of 400 gigabits per second and above per channel using the advanced modulation formats described above. The integration of the transceiver components on a silicon substrate reduces component count compared to conventional multi-chip approaches, lowers power consumption, and enables wafer-scale manufacturing using standard CMOS-compatible fabrication processes, thereby significantly reducing the cost per transceiver unit.
BRIEF DESCRIPTION OF THE DRAWINGS
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the detailed description, serve to explain the principles of the invention.
FIG. 1 is a block diagram of the coherent optical transceiver system integrated on a silicon substrate, showing the transmitter section, receiver section, local oscillator interface, and digital signal processing unit, in accordance with an embodiment of the present invention.
FIG. 2 is a cross-sectional view of the silicon photonic chip showing the silicon-on-insulator waveguide layers, the modulator region with carrier-depletion doping profiles, and the germanium photodetector region, in accordance with an embodiment of the present invention.
FIG. 3 is a top-view layout of the coherent detection module showing the polarization beam splitter, polarization rotator, dual 90-degree optical hybrids, and balanced photodetector pairs for the in-phase and quadrature channels of each polarization, in accordance with an embodiment of the present invention.
FIG. 4 is a detailed schematic of the modulator array with traveling-wave electrodes, showing the nested Mach-Zehnder modulator configuration for dual-polarization IQ modulation, in accordance with an embodiment of the present invention.
FIG. 5 is a diagram of the local oscillator laser interface showing alternative implementations including hybrid bonding of an InP laser die, edge coupling via a spot-size converter, and micro-transfer printing of III-V gain material onto the silicon waveguide, in accordance with embodiments of the present invention.
FIG. 6 is a thermal simulation result showing heat distribution across the integrated transceiver chip under typical operating conditions, illustrating temperature gradients in the modulator, detector, and laser interface regions, in accordance with an embodiment of the present invention.
FIG. 7 is a performance graph showing measured bit-error rate (BER) as a function of optical signal-to-noise ratio (OSNR) for the integrated coherent transceiver operating with DP-QPSK and DP-16QAM modulation formats, in accordance with an embodiment of the present invention.
FIG. 8 is a block diagram of the digital signal processing subsystem for coherent signal recovery, showing the functional blocks for analog-to-digital conversion, deskew, chromatic dispersion compensation, adaptive equalization, carrier recovery, and forward error correction, in accordance with an embodiment of the present invention.
FIG. 9 is an exploded view of the transceiver module package showing the silicon photonic chip, the electrical interposer, the fiber coupling assembly with fiber array unit, and the module housing configured for a pluggable form factor, in accordance with an embodiment of the present invention.
FIG. 10 is a flow diagram of the fabrication process for the integrated coherent transceiver, illustrating the major process steps from SOI wafer preparation through final hybrid bonding and packaging, in accordance with an embodiment of the present invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
Reference will now be made in detail to preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the preferred embodiments, it will be understood that these embodiments are not intended to limit the invention. On the contrary, the invention is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the invention as defined by the appended claims.
1. Overall Transceiver Architecture
Referring to FIG. 1, a coherent optical transceiver 100 in accordance with an embodiment of the present invention is integrated on a silicon substrate 102 and comprises a transmitter section 110 and a receiver section 120 disposed on the single silicon substrate 102. The silicon substrate 102 is preferably a silicon-on-insulator (SOI) wafer comprising a silicon device layer, a buried oxide (Box) layer, and a silicon handle wafer, as will be described in greater detail below.
The transmitter section 110 includes a continuous-wave (CW) laser source 112, which may be hybrid-integrated onto the silicon substrate 102 via a hybrid bonding region or edge-coupled to the silicon substrate 102 via a spot-size converter. The CW laser source 112 provides a continuous optical carrier at a wavelength in the C-band (approximately 1530 nm to 1565 nm) for modulation by the transmitter section 110.
The transmitter section 110 further includes a polarization beam splitter/rotator 114 that divides the CW laser output into two orthogonal polarization paths for dual-polarization modulation. An array of Mach-Zehnder modulators (MZMs) 116 is configured in an IQ modulation format, with nested MZM pairs arranged to generate in-phase (I) and quadrature (Q) modulated signals for each polarization. The modulated signals from both polarization paths are combined by a polarization beam combiner 118, and the combined output is directed to output coupling optics 119, which may comprise an edge coupler or a grating coupler, for coupling the modulated optical signal into a transmission fiber.
The receiver section 120 includes an input coupling element 122, which may be a grating coupler or an edge coupler, for receiving an incoming optical signal from a fiber. The incoming optical signal is directed to a polarization-diverse front end 124, which separates the incoming signal into its two orthogonal polarization components and rotates one polarization to the preferred waveguide mode (typically the transverse-electric or TE mode) for processing in the silicon waveguide platform. The polarization-diverse front end 124 feeds the separated polarization components to a coherent detection module 130, which will be described in detail in the following section.
The coherent detection module 130 receives both the incoming signal and a local oscillator (LO) signal provided via a local oscillator interface 140. The coherent detection module 130 mixes the incoming signal with the LO signal using 90-degree optical hybrids and detects the resulting interference signals using balanced germanium (Ge) photodetectors to produce electrical signals representative of the in-phase and quadrature components of the incoming optical signal for each polarization.
A digital signal processing (DSP) unit 150 is operatively connected to the coherent detection module 130 and the modulator array 116. The DSP unit 150 may be implemented as a co-packaged ASIC on a common interposer with the silicon photonic chip, or it may be monolithically integrated on the same silicon substrate 102. The DSP unit 150 performs the signal processing functions required for coherent signal recovery in the receiver path and signal conditioning in the transmitter path.
2. The Coherent Detection Module
Referring to FIG. 3, the coherent detection module 130 is described in detail. The coherent detection module 130 is a key functional element of the receiver section 120 and is configured to enable full recovery of both the amplitude and phase information encoded in the incoming coherent optical signal across both orthogonal polarization states.
The coherent detection module 130 comprises the following components, each formed on or integrated with the silicon substrate 102:
(a) A polarization beam splitter (PBS) 132 that receives the incoming optical signal from the input coupling element 122 and separates the incoming light into its transverse-electric (TE) and transverse-magnetic (TM) polarization components. The PBS 132 may be implemented as a directional coupler-based polarization splitter, an adiabatic taper-based splitter, or a mode-evolution-based splitter, each of which leverages the birefringence of the silicon waveguide to achieve polarization separation with extinction ratios exceeding 20 dB.
(b) A polarization rotator (PR) 134 that receives the TM polarization component from the PBS 132 and converts it to the TE mode for subsequent processing in the silicon waveguide platform. The polarization rotator 134 may be implemented as a mode-evolution-based rotator using an asymmetric waveguide cross-section, or as a Faraday rotator element integrated on the chip. The use of a polarization rotator ensures that both polarization paths can be processed using the same waveguide and device designs optimized for TE-mode operation, simplifying the circuit design and improving performance uniformity.
(c) Two 90-degree optical hybrids 136a, 136b, one for each polarization path. Each 90-degree optical hybrid 136a, 136b receives the respective polarization component of the incoming signal and a split portion of the local oscillator signal from the LO interface 140. The 90-degree optical hybrid mixes the signal and LO with relative phase differences of 0°, 90°, 180°, and 270°, producing four output signals from which the in-phase and quadrature components of the optical field can be extracted. Each 90-degree optical hybrid 136a, 136b may be implemented as a 4×4 multimode interference (MMI) coupler, a 2×4 MMI coupler with phase-shifted arms, or a network of 2×2 directional couplers with appropriate phase delays.
(d) Four pairs of balanced germanium (Ge) photodetectors 138a-138d, each pair associated with one output quadrature of one polarization channel. Specifically, photodetector pair 138a detects the in-phase (I) component of the X-polarization, photodetector pair 138b detects the quadrature (Q) component of the X-polarization, photodetector pair 138c detects the in-phase (I) component of the Y-polarization, and photodetector pair 138d detects the quadrature (Q) component of the Y-polarization. Each balanced photodetector pair comprises two germanium photodetectors connected in a differential configuration, which provides common-mode rejection of intensity noise and enhances the detected signal quality.
The coherent detection module 130 is distinguished from simple direct-detection receivers by its ability to recover both amplitude and phase information of the optical signal. In a direct-detection receiver, only the intensity (square of the amplitude) of the optical signal is detected, and phase information is lost. By contrast, the coherent detection module 130, through the use of the 90-degree optical hybrids and the local oscillator reference, preserves the full complex optical field (amplitude and phase) for subsequent processing by the DSP unit 150. This capability is essential for demodulating the advanced modulation formats (DP-QPSK, DP-16QAM) used to achieve high spectral efficiencies.
The coherent detection module 130 is designed to maintain low polarization-dependent loss (PDL) through careful waveguide geometry optimization and tight process control during fabrication. Specifically, the waveguide dimensions in the PBS 132 and PR 134 are optimized through numerical simulation to minimize differential insertion loss between the TE and TM paths. Process control measures—including tight dimensional tolerances on waveguide width and height achieved through advanced deep ultraviolet (DUV) lithography—ensure that the fabricated devices closely match the designed performance targets. In preferred embodiments, the PDL of the coherent detection module 130 is less than 0.5 dB across the operating wavelength range, which is sufficient to ensure that the coherent detection process does not suffer significant performance degradation due to polarization-dependent effects.
3. Silicon-Based Modulator Array
Referring to FIG. 4, the modulator array 116 is described in detail. The modulator array 116 comprises a plurality of carrier-depletion-type silicon Mach-Zehnder modulators (MZMs) formed on the silicon substrate 102. Each MZM includes a pair of waveguide arms with P-N junction phase shifters embedded in the waveguide core. When a reverse-bias voltage is applied across the P-N junction, the carrier concentration in the depletion region changes, modifying the effective refractive index of the waveguide through the plasma dispersion effect. This refractive index change produces a phase shift in the optical signal propagating through the modulator arm, and the interference of the two arms at the output coupler of the MZM converts the phase modulation to amplitude modulation.
The modulator array 116 employs a traveling-wave electrode design to achieve high electro-optic bandwidth. In the traveling-wave configuration, the RF drive signal and the optical signal co-propagate along the modulator arm, with the electrode design optimized to match the RF and optical group velocities and to minimize RF propagation loss. This velocity-matching and loss-minimization enables electro-optic bandwidths exceeding 40 GHz, which is sufficient for symbol rates of 64 GBaud and above as required for 400 Gbps per channel operation with DP-16QAM modulation.
The modulator array 116 is arranged in a nested MZM configuration for generating dual-polarization IQ-modulated signals. Specifically, the configuration comprises four child MZMs nested within two parent MZMs, with each parent MZM generating an IQ-modulated signal for one polarization. The in-phase (I) child MZM and the quadrature (Q) child MZM within each parent MZM are driven with the data signals, while the parent MZM bias is set to establish the 90-degree phase offset between the I and Q paths. This nested configuration enables the generation of DP-QPSK signals when each child MZM is driven with a binary signal, or DP-16QAM signals when each child MZM is driven with a four-level pulse-amplitude-modulated (PAM-4) signal.
In preferred embodiments, the modulator array 116 achieves a half-wave voltage (Vπ) of approximately 4.5 V at a modulator length of 4 mm, an insertion loss of less than 5 dB per modulator, and an extinction ratio exceeding 25 dB. These performance metrics are achieved through optimization of the P-N junction doping profile and the waveguide dimensions.
4. Local Oscillator Laser Interface
Referring to FIG. 5, the local oscillator (LO) interface 140 is described. The LO interface 140 provides the means for coupling a local oscillator laser to the silicon photonic chip for use as the optical reference in the coherent detection process.
The present invention contemplates several alternative implementations of the LO interface 140, each suitable for different application scenarios and manufacturing requirements:
(a) Hybrid Bonding. In a first embodiment, the LO interface 140 comprises a hybrid bonding region 142 on the silicon substrate 102, onto which an InP or InGaAsP laser die 144 is directly bonded. The hybrid bonding may employ direct wafer bonding, adhesive bonding (e.g., using benzocyclobutene or DVS-bis-benzocyclobutene), or metallic bonding techniques. The laser die 144 includes a gain medium and, optionally, grating structures for wavelength selection. Light from the bonded laser die 144 is evanescently coupled into the underlying silicon waveguide through a carefully designed taper structure. This approach offers tight integration, compact form factor, and the potential for wafer-scale bonding of multiple laser dies onto a single silicon wafer.
(b) Edge Coupling. In a second embodiment, the LO interface 140 comprises a spot-size converter 146 at an edge facet of the silicon photonic chip, configured to couple light from an external laser module 148 (such as a butterfly-packaged narrow-linewidth laser or a micro-optic bench laser assembly) into the silicon waveguide. The spot-size converter 146 includes an inverse-taper structure that gradually narrows the silicon waveguide tip, causing the optical mode to expand and better match the mode field diameter of the external laser. This approach provides flexibility in laser selection and allows the use of independently qualified and characterized laser modules.
(c) Micro-Transfer Printing. In a third embodiment, the LO interface 140 comprises a micro-transfer-printed III-V gain element 149 deposited onto the silicon substrate 102 using micro-transfer printing techniques. In this process, the III-V gain element is fabricated on a sacrificial release layer on a III-V source wafer, then picked up using a structured elastomeric stamp and printed onto the designated location on the silicon wafer. This approach combines the integration density of hybrid bonding with the scalability advantages of batch processing, as multiple gain elements can be printed simultaneously across a silicon wafer.
Each of the above approaches provides the local oscillator signal required for coherent detection. The choice among these approaches is guided by the specific requirements of the target application, including considerations of linewidth, tuning range, output power, manufacturing yield, and cost.
5. Integration on Silicon Substrate
The silicon substrate 102 on which the coherent optical transceiver 100 is integrated preferably comprises a silicon-on-insulator (SOI) wafer. Referring to FIG. 2, the SOI wafer includes a silicon device layer 202 having a thickness of approximately 220 nm, a buried oxide (Box) layer 204 having a thickness of approximately 2 µm, and a silicon handle wafer 206 having a thickness of approximately 725 µm (for a 200 mm diameter wafer) or approximately 775 µm (for a 300 mm diameter wafer). These dimensions are compatible with standard CMOS foundry processes offered by multiple commercial silicon photonics foundries.
The waveguides of the transceiver 100 are formed in the 220 nm silicon device layer 202 by patterning using deep ultraviolet (DUV) lithography (193 nm or 248 nm wavelength) followed by reactive ion etching. Both fully etched (strip) waveguides and partially etched (rib) waveguides are used, with waveguide widths ranging from approximately 400 nm to 550 nm for single-mode operation at 1550 nm wavelength. The high refractive-index contrast between the silicon core (refractive index approximately 3.47 at 1550 nm) and the silicon dioxide cladding (refractive index approximately 1.44 at 1550 nm) enables tight optical confinement and minimum bend radii as small as 5 µm.
As used herein, the term "integrated on a silicon substrate" means formed on or within a silicon-based wafer using semiconductor fabrication processes. This term encompasses both monolithic integration—in which all optical and electronic components are fabricated directly in or on the silicon wafer using CMOS-compatible process steps—and heterogeneous integration techniques—including hybrid bonding, micro-transfer printing, and other die-attach or material-transfer processes—in which non-silicon materials (such as III-V semiconductor gain media) are bonded to or deposited onto the silicon wafer to provide functionalities (such as optical gain) that are not natively available in silicon. The defining characteristic of "integrated on a silicon substrate" is that the silicon wafer serves as the primary substrate on which the transceiver components are built, and the fabrication process leverages silicon semiconductor manufacturing infrastructure.
This construction is consistent with the specification as a whole, which describes multiple alternative implementations of the local oscillator interface including hybrid bonding (Section 4(a)), edge coupling (Section 4(b)), and micro-transfer printing (Section 4(c)), and which uniformly refers to the resulting transceiver as "integrated on a silicon substrate" regardless of which laser integration approach is used.
6. Digital Signal Processing
Referring to FIG. 8, the DSP unit 150 is described. The DSP unit 150 performs the signal processing functions necessary for coherent signal recovery in the receiver path and signal conditioning in the transmitter path. In the receiver path, the DSP unit 150 receives digitized electrical signals from analog-to-digital converters (ADCs) 152 connected to the outputs of the balanced photodetectors 138a-138d and performs the following processing steps:
(a) Deskew and Orthogonalization: Correction of timing skew and gain/phase imbalance between the I and Q signal paths and between the X and Y polarization paths.
(b) Chromatic Dispersion (CD) Compensation: Digital equalization of the chromatic dispersion accumulated during fiber transmission. The CD compensation filter may be implemented as a frequency-domain equalizer using fast Fourier transform (FFT) processing, enabling compensation of dispersion values exceeding 50,000 ps/nm without optical dispersion compensation modules.
(c) Polarization Demultiplexing and Adaptive Equalization: A multiple-input, multiple-output (MIMO) adaptive equalizer that separates the two polarization tributaries and compensates for polarization-mode dispersion (PMD), polarization-dependent loss, and residual inter-symbol interference. The adaptive equalizer may employ the constant modulus algorithm (CMA) for initial convergence followed by a decision-directed least-mean-square (DD-LMS) algorithm for steady-state tracking.
(d) Carrier Frequency and Phase Recovery: Algorithms for estimating and compensating the frequency offset and phase noise between the transmitter laser and the local oscillator laser. Carrier frequency offset estimation may employ a fourth-power frequency estimation technique, and carrier phase recovery may employ a blind phase search algorithm or a Viterbi-Viterbi algorithm.
(e) Forward Error Correction (FEC): Decoding of FEC-encoded data to correct bit errors remaining after equalization and carrier recovery. The FEC may employ a concatenated hard-decision FEC code (e.g., BCH-based) or a soft-decision FEC code (e.g., low-density parity-check or turbo product code) depending on the required net coding gain.
In the transmitter path, the DSP unit 150 generates the electrical drive signals for the modulator array 116, including digital pre-distortion to compensate for modulator nonlinearity and frequency response roll-off, pulse shaping to control the signal spectrum, and FEC encoding.
The DSP unit 150 may be implemented in a co-packaged ASIC fabricated in an advanced CMOS technology node (e.g., 7 nm or 16 nm FinFET). In a co-packaged configuration, the DSP ASIC is mounted on a common substrate or interposer with the silicon photonic chip, connected via high-speed electrical traces or through-silicon vias (TSVs), to minimize the length of the high-speed electrical interconnects between the photodetectors and the ADCs, and between the digital-to-analog converters (DACs) and the modulators. Alternatively, in some embodiments, the DSP functionality may be integrated on the same silicon interposer as the photonic circuit, leveraging advanced 2.5D or 3D packaging techniques.
7. Thermal Management
The integrated coherent optical transceiver 100 incorporates thermal management features to ensure stable operation under the power densities and operating conditions typical of pluggable transceiver modules deployed in high-density data-center environments. The thermal management approach for the transceiver 100 is designed to maintain the temperature of critical components—particularly the laser source, the modulators, and the photodetectors—within their specified operating ranges.
Referring to FIG. 6, thermal simulation results show the heat distribution across the integrated transceiver chip under typical operating conditions. The simulation accounts for heat generation in the modulator electrodes, the photodetectors, the driver circuitry (if co-integrated), and the laser source. The silicon substrate itself serves as an effective heat spreader due to the high thermal conductivity of silicon (approximately 150 W/m·K), which distributes heat laterally from the active device regions to the surrounding substrate area.
Additional thermal management features may include localized micro-heaters for wavelength tuning of resonant components, thermoelectric cooler (TEC) elements integrated into the module package, and optimized heat-sink attachment using thermally conductive adhesives or solder. The design principles for thermal management of photonic integrated circuits in high-density packaging environments are generally understood in the art, and the present invention contemplates the application of such techniques as appropriate for the specific module package and deployment environment.
8. Performance Results
In an exemplary embodiment, the integrated coherent optical transceiver 100 of the present invention has been demonstrated to achieve 400 gigabits per second (Gbps) per channel coherent transmission over 80 km of standard single-mode fiber (SSMF) with a bit-error rate (BER) below the pre-FEC threshold of 2 × 10⁻². Referring to FIG. 7, the measured BER as a function of optical signal-to-noise ratio (OSNR) is plotted for both DP-QPSK and DP-16QAM modulation formats.
For the DP-16QAM modulation format operating at a symbol rate of 64 GBaud, the transceiver achieves an OSNR sensitivity of approximately 24 dB at a BER of 10⁻³ (measured in a 0.1 nm noise bandwidth), which is within approximately 2 dB of the theoretical limit for this modulation format. The implementation penalty is attributed to the finite extinction ratio of the silicon MZMs, residual phase error in the 90-degree optical hybrids, and electronic noise contributions from the transimpedance amplifiers and ADCs.
For the DP-QPSK modulation format, the transceiver achieves an OSNR sensitivity of approximately 14 dB at a BER of 10⁻³, enabling operation with greater margin for longer-reach or lower-OSNR applications.
The power consumption of the photonic integrated circuit (PIC) portion of the transceiver—excluding the DSP ASIC—is approximately 3.5 W per channel. This represents a significant reduction compared to conventional InP-based coherent transceivers, which typically consume 8–12 W per channel for the photonic components alone. The reduced power consumption is attributable to the lower drive voltages of the silicon MZMs compared to lithium niobate modulators, the efficient germanium photodetectors, and the elimination of inter-chip optical coupling losses.
9. Manufacturing Process
Referring to FIG. 10, the fabrication process for the integrated coherent transceiver 100 is described. The manufacturing process employs a CMOS-compatible fabrication flow that can be executed in a standard silicon photonics foundry with the addition of heterogeneous integration process steps for laser integration.
The major process steps are as follows:
(Step 1) SOI Wafer Preparation. A silicon-on-insulator wafer with a 220 nm silicon device layer and a 2 µm buried oxide layer is prepared. The wafer is cleaned and inspected to verify layer thickness uniformity and surface quality.
(Step 2) Waveguide Patterning. The silicon device layer is patterned using 193 nm deep ultraviolet (DUV) lithography to define the waveguide structures, including strip waveguides, rib waveguides, multimode interference couplers, grating couplers, and directional coupler-based polarization beam splitters. A two-step etch process is used, with a full etch (220 nm depth) for strip waveguides and a partial etch (approximately 70 nm or 90 nm depth) for rib waveguides and grating couplers.
(Step 3) Implantation for Modulators. Ion implantation is performed to define the P-N junction regions of the carrier-depletion silicon MZMs. Multiple implant steps with different dopant species (boron for p-type, phosphorus for n-type) and energies are used to create the desired doping profile across the waveguide cross-section. The doping levels are optimized to achieve the target Vπ while maintaining acceptable optical absorption loss.
(Step 4) Germanium Epitaxy for Photodetectors. Selective-area epitaxial growth of germanium is performed on the silicon substrate in the designated photodetector regions. The germanium is grown using chemical vapor deposition (CVD) at elevated temperature, followed by cyclic annealing to reduce threading dislocation density. The germanium photodetectors are then completed by forming P-I-N diode structures through additional implantation and metallization steps.
(Step 5) Metallization for Electrodes. Multi-level metal interconnects are formed using standard back-end-of-line (BEOL) processing, including deposition of interlayer dielectrics (silicon dioxide or low-κ materials), via etching, and metal (copper or aluminum) deposition and patterning. The traveling-wave electrodes for the MZMs are formed in the upper metal layers, with the electrode geometry optimized for RF-optical velocity matching and impedance matching to 50 Ω transmission lines.
(Step 6) Back-End-of-Line (BEOL) Processing. Additional BEOL processing steps include formation of bond pads for electrical connections, passivation layer deposition, and formation of redistribution layers (RDLs) for connection to the module package or interposer.
(Step 7) Hybrid Bonding Step (Optional). For embodiments employing hybrid-bonded laser sources, an additional process step is performed in which III-V semiconductor laser dies are bonded to designated regions of the silicon wafer. The bonding may be performed at the wafer level (bonding a III-V wafer or coupon to the full silicon wafer) or at the die level (placing individual III-V laser dies on the silicon wafer using pick-and-place tools). Following bonding, the III-V material is processed (e.g., etched, metallized) to form the laser structures.
(Step 8) Wafer Testing and Dicing. Automated wafer-level testing is performed to verify the functionality and performance of the integrated transceivers. The wafer is then diced into individual PIC dies using stealth dicing or blade dicing.
(Step 9) Packaging. The diced PIC dies are packaged into transceiver modules, including mounting on an interposer, electrical connection to the DSP ASIC, attachment of fiber coupling assemblies (e.g., fiber array units), and encapsulation in a module housing conforming to the target pluggable form factor (e.g., QSFP-DD, OSFP).
INDUSTRIAL APPLICABILITY
The integrated coherent optical transceiver of the present invention has broad industrial applicability in the field of optical communications. The transceiver is applicable to data-center interconnects (DCI), where it enables high-bandwidth connections between geographically distributed data centers operated by hyperscale cloud service providers. The compact form factor and low power consumption of the silicon-photonic-integrated transceiver enable deployment in pluggable form factors such as QSFP-DD (Quad Small Form Factor Pluggable - Double Density) and OSFP (Octal Small Form Factor Pluggable), which are the industry-standard interfaces used in high-port-count data-center switches.
The transceiver is also applicable to metropolitan-area networks (metro), where coherent transmission enables high-capacity links spanning distances of 80 to 600 km without optical amplification (for shorter metro links) or with a limited number of optical amplifiers (for longer metro links). The chromatic dispersion and polarization-mode dispersion compensation capabilities of the integrated DSP unit eliminate the need for external optical dispersion compensation, simplifying the network architecture and reducing deployment cost.
Additionally, the transceiver is applicable to long-haul telecommunications networks, where the high spectral efficiency of coherent modulation formats and the DSP-enabled impairment compensation enable efficient utilization of optical fiber capacity over distances exceeding 1000 km.
The silicon photonic integration approach of the present invention reduces the total cost of ownership for network operators by leveraging wafer-scale manufacturing on large-diameter silicon wafers, which enables high manufacturing volumes and low per-unit cost. The CMOS-compatible fabrication process ensures access to a broad supply base of semiconductor foundries, reducing supply chain risk and enabling rapid scaling of production capacity to meet growing market demand.
US 10,891,193 B2
CLAIMS
What is claimed is:
1. A coherent optical transceiver integrated on a silicon substrate, comprising:
a coherent detection module configured to receive an optical signal and a local oscillator signal, the coherent detection module comprising at least one 90-degree optical hybrid and a plurality of balanced photodetectors;
a modulator array formed on the silicon substrate, the modulator array comprising a plurality of Mach-Zehnder modulators configured to modulate a carrier optical signal;
a local oscillator interface configured to couple a local oscillator laser to the silicon substrate; and
a digital signal processing unit operatively connected to the coherent detection module and the modulator array;
wherein the coherent detection module, the modulator array, and the local oscillator interface are integrated on the silicon substrate.
2. The transceiver of claim 1, wherein the balanced photodetectors comprise germanium photodetectors formed on the silicon substrate.
3. The transceiver of claim 1, wherein the coherent detection module further comprises a polarization beam splitter and a polarization rotator configured to process both TE and TM polarization components of the received optical signal.
4. The transceiver of claim 1, wherein the modulator array comprises nested Mach-Zehnder modulators configured to generate a dual-polarization quadrature phase-shift keying (DP-QPSK) signal.
5. The transceiver of claim 1, wherein the modulator array comprises nested Mach-Zehnder modulators configured to generate a dual-polarization 16-quadrature amplitude modulation (DP-16QAM) signal.
6. The transceiver of claim 1, wherein the local oscillator interface comprises a hybrid bonding region for attaching a III-V semiconductor laser die to the silicon substrate.
7. A method for coherent optical communication, comprising:
receiving an optical signal at a coherent detection module integrated on a silicon substrate, the coherent detection module comprising at least one 90-degree optical hybrid;
mixing the received optical signal with a local oscillator signal in the coherent detection module to produce electrical signals representative of in-phase and quadrature components of the optical signal;
detecting the electrical signals using a plurality of balanced photodetectors integrated on the silicon substrate;
processing the detected electrical signals using a digital signal processing unit to recover transmitted data; and
modulating a carrier optical signal using a modulator array integrated on the silicon substrate for transmission.
8. The method of claim 7, wherein the step of mixing comprises splitting the received optical signal into two orthogonal polarization components and mixing each polarization component separately with the local oscillator signal.
9. The method of claim 7, further comprising compensating for chromatic dispersion and polarization mode dispersion in the digital signal processing unit.
10. A silicon photonic integrated circuit for coherent optical transceiver applications, comprising:
a silicon-on-insulator substrate;
a transmitter section formed on the substrate, the transmitter section comprising at least one optical modulator;
a receiver section formed on the substrate, the receiver section comprising a coherent detection module with at least one optical hybrid and balanced photodetectors;
a waveguide network formed on the substrate connecting the transmitter section, the receiver section, and at least one optical input/output port; and
wherein the silicon photonic integrated circuit is configured to support coherent optical transmission at a data rate of at least 400 gigabits per second per channel.
11. The circuit of claim 10, wherein the at least one optical modulator comprises a carrier-depletion silicon Mach-Zehnder modulator with an electro-optic bandwidth of at least 35 GHz.
12. The circuit of claim 10, wherein the balanced photodetectors have a responsivity of at least 0.8 A/W at a wavelength of 1550 nm.
13. The circuit of claim 10, further comprising a spot-size converter at the at least one optical input/output port for edge coupling to an optical fiber.
14. The circuit of claim 10, further comprising an integrated wavelength-division multiplexer for combining multiple channel signals onto a single output waveguide.
15. A coherent optical transceiver module, comprising:
a silicon photonic chip;
means for coherently detecting an incoming optical signal on the silicon photonic chip;
means for modulating an outgoing optical signal on the silicon photonic chip;
a local oscillator laser optically coupled to the silicon photonic chip; and
a digital signal processing integrated circuit electrically connected to the silicon photonic chip.
16. The module of claim 15, wherein the silicon photonic chip and the digital signal processing integrated circuit are co-packaged on a common substrate or interposer.
17. The module of claim 15, wherein the local oscillator laser is a narrow-linewidth tunable laser with a linewidth of less than 100 kHz.
18. The module of claim 15, wherein the module is configured to fit within a QSFP-DD or OSFP pluggable form factor.
19. A system for data-center optical interconnection, comprising:
a plurality of coherent optical transceiver modules according to claim 15, interconnected via optical fibers, and configured for wavelength-division-multiplexed coherent transmission.
20. The system of claim 19, wherein each transceiver module supports at least four wavelength channels.
21. The system of claim 19, further comprising a network switch configured to dynamically allocate wavelength channels among the transceiver modules.
22. A method for fabricating an integrated coherent transceiver on a silicon substrate, comprising: