UNITED STATES PATENT AND TRADEMARK OFFICE
UTILITY PATENT APPLICATION (Non-Provisional)
Application Number: U.S. App. No. 17/672,204
Filing Date: January 9, 2023
Title of Invention: MULTI-CHANNEL SILICON-PHOTONIC MACH-ZEHNDER MODULATOR WITH SEGMENTED TRAVELING-WAVE ELECTRODE ARCHITECTURE
Docket No.: C&H Matter No. 1014-00005 Client Ref: OWS-PAT-2023-001
APPLICANT / ASSIGNEE INFORMATION
Applicant and Assignee:
Optiwave Semiconductor Corp. A Delaware corporation 4710 Ridgeview Parkway, Suite 300 Santa Clara, CA 95054 EIN: 83-2947105
Entity Status: Small Entity
NAMED INVENTORS
CORRESPONDENCE ADDRESS
Calderwood & Harkness LLP
Attn: Christy Bauer, Reg. No. 74,329
555 California Street, 42nd Floor San Francisco, CA 94104 Telephone: (415) 555-8100 Facsimile: (415) 555-8101
Email: cbauer@calderwoodharkness.com
ATTORNEY / AGENT INFORMATION
All practitioners are members of the intellectual Property Group of Calderwood & Harkness LLP and are registered to practice before the United States Patent and Trademark Office.
SPECIFICATION
PRIORITY CLAIM AND CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims the benefit of U.S. Provisional Application No. 63/297,841, titled "Multi-Channel Silicon-Photonic Mach-Zehnder Modulator with Segmented Traveling-Wave Electrode Architecture," filed January 10, 2022, the entire disclosure of which is hereby incorporated by reference in its entirety as if fully set forth herein.
The aforementioned provisional application was originally filed by Kessler & Morin LLP on behalf of Optiwave Semiconductor Corp. The present non-provisional application is filed on January 9, 2023, within the twelve-month statutory period prescribed under 35 U.S.C. § 119(e), the provisional application having an expiration date of January 10, 2023. Accordingly, the present application is entitled to the benefit of the January 10, 2022 priority date established by the provisional application.
This application is related to the following applications, which are part of the same patent family:
(a) U.S. Application No. 17/672,311, filed March 15, 2023, which is a continuation of the present application;
(b) U.S. Application No. 17/672,489, filed June 22, 2023, which is a continuation-in-part of the present application;
(c) International Application No. PCT/US2023/010584, filed January 9, 2023, designating all eligible countries and claiming priority to U.S. Provisional Application No. 63/297,841; and
(d) International Application No. PCT/US2023/010612, filed January 9, 2023, designating all eligible countries and claiming priority to U.S. Provisional Application No. 63/297,841.
The disclosures of the above-identified related applications are incorporated herein by reference to the extent they are consistent with the present disclosure.
TITLE OF THE INVENTION
MULTI-CHANNEL SILICON-PHOTONIC MACH-ZEHNDER MODULATOR WITH SEGMENTED TRAVELING-WAVE ELECTRODE ARCHITECTURE
FIELD OF THE INVENTION
The present invention relates generally to silicon-photonics integrated circuits (PICs) for optical communications. More specifically, the present invention pertains to high-speed Mach-Zehnder modulator (MZM) structures incorporating segmented traveling-wave electrode architectures for use in data-center optical transceiver modules operating at data rates of 800 Gbps (800G) and 1.6 Tbps (1.6T) per lane.
The invention is situated within the field of fabless semiconductor design and, more particularly, is directed to next-generation silicon-photonics modulator architectures suitable for both coherent and intensity-modulation direct-detection (IM/DD) optical interconnects. The devices and methods described herein are intended for integration into pluggable optical transceiver modules, co-packaged optics assemblies, and other photonic communication subsystems deployed in hyperscale data centers, telecommunications networks, and high-performance computing environments.
BACKGROUND OF THE INVENTION
The explosive growth of cloud computing, artificial intelligence (AI) workloads, machine learning training clusters, and hyperscale data-center expansion has driven an unprecedented demand for higher-bandwidth optical interconnects. Modern data centers require optical transceivers capable of transmitting data at rates of 800 Gbps and beyond on a per-module basis, with next-generation roadmaps targeting 1.6 Tbps aggregate throughput per transceiver module. These escalating bandwidth requirements necessitate optical modulators that can operate at symbol rates of 100 Gbaud and higher, while maintaining acceptable signal-to-noise ratios, low drive voltages, and compact form factors suitable for high-density integration.
Silicon photonics has emerged as an enabling technology platform for addressing these requirements. By leveraging standard complementary metal-oxide-semiconductor (CMOS)-compatible fabrication processes on silicon-on-insulator (SOI) substrates, silicon-photonics technology enables the monolithic or hybrid integration of optical components — including waveguides, modulators, photodetectors, and multiplexers — on a single chip. This integration approach offers significant advantages in terms of manufacturing scalability, cost reduction, and co-packaging with electronic driver and transimpedance amplifier (TIA) integrated circuits.
Among the various optical modulation approaches available on silicon-photonics platforms, the Mach-Zehnder modulator (MZM) is one of the most widely employed architectures. An MZM operates on the principle of optical interference: an input optical signal is split into two arms of an interferometer, each arm incorporating an electro-optic phase shifter, and the two arms are subsequently recombined at an output coupler. By applying an electrical signal to the phase shifters, the relative optical phase between the two arms is modulated, causing constructive or destructive interference at the output and thereby modulating the intensity (or, in coherent systems, the amplitude and phase) of the optical signal.
For high-speed operation, the electrical signal driving the phase shifters must propagate along the modulator arm in a manner that maintains temporal alignment with the optical signal propagating through the waveguide. This requirement is addressed by the use of traveling-wave electrode (TWE) designs, in which the electrical drive signal propagates as an RF wave along a transmission line electrode structure that is co-linear with the optical waveguide. Effective modulation at high frequencies requires velocity matching — the condition in which the RF signal propagation velocity along the electrode closely matches the optical group velocity of the guided mode in the silicon waveguide. In addition, the characteristic impedance of the electrode transmission line must be matched to the impedance of the RF driver circuit (typically 50 Ω) to minimize reflections and maximize power transfer.
To improve performance over long modulator lengths, segmented traveling-wave electrode architectures have been developed. In a segmented TWE design, the continuous electrode is divided into a plurality of discrete segments arranged in series along the modulator arm. Each segment can be independently optimized in terms of its geometry (electrode width, gap spacing to ground electrodes, and metallization thickness) to achieve local velocity matching and impedance control. This approach allows designers to accommodate the variation in optical and electrical propagation characteristics along the length of the modulator, which may arise from fabrication non-uniformities, waveguide dispersion, and the longitudinal variation of the electro-optic interaction efficiency.
Despite the advantages of segmented TWE architectures, existing implementations suffer from significant limitations that impair performance at the frequencies required for 800G and 1.6T applications. Conventional segmented TWE designs employ electrode segments of uniform geometry within each segment, with abrupt transitions at the boundaries between adjacent segments. At each segment boundary, the change in electrode width and/or gap spacing creates an impedance discontinuity — a sudden step change in the characteristic impedance of the transmission line. These impedance discontinuities cause partial reflections of the RF signal at each boundary, generating reflected waves that interfere with the forward-propagating drive signal. The cumulative effect of multiple such reflections across a multi-segment electrode structure includes increased return loss, degraded forward transmission (reduced S21), signal distortion due to inter-segment standing waves, and an overall narrowing of the modulator's electro-optic bandwidth.
In practical terms, the bandwidth degradation caused by abrupt-transition segment boundaries has been observed to limit the 3-dB electro-optic bandwidth of conventional segmented TWE modulators to approximately 45–50 GHz — well below the approximately 67 GHz bandwidth required to support 100 Gbaud PAM-4 modulation with acceptable signal quality. The severity of this limitation increases with the number of electrode segments, making it particularly problematic for long modulators (which require more segments) and for designs targeting low drive voltages (which require longer interaction lengths and thus more segments).
Prior art approaches have attempted to address this problem through various means, including the use of fixed-width electrode segments with carefully selected uniform gap spacings, lumped-element matching networks inserted at segment boundaries, and optimization of segment lengths to minimize the aggregate impedance mismatch. However, these approaches have met with limited success. Lumped-element matching networks introduce additional parasitic capacitance and inductance, which degrade high-frequency performance. Optimization of segment geometry alone cannot eliminate the fundamental problem of abrupt impedance transitions inherent in the uniform-segment approach.
The general state of the art in segmented TWE design is reflected in various published references and issued patents directed to segmented electrode architectures with specific segmentation geometries. While improvements have been made incrementally, the fundamental challenge of impedance discontinuity at segment boundaries remains a significant bottleneck to achieving the modulation bandwidths required by emerging 800G and 1.6T transceiver standards.
Accordingly, there exists a need in the art for an improved segmented traveling-wave electrode architecture that maintains impedance continuity across segment transitions, thereby enabling higher modulation bandwidth, improved RF signal integrity, and reduced drive voltage requirements for silicon-photonic Mach-Zehnder modulators operating at 800G and 1.6T data rates.
SUMMARY OF THE INVENTION
The present invention addresses the foregoing limitations of the prior art by providing a multi-channel silicon-photonic Mach-Zehnder modulator incorporating a segmented traveling-wave electrode architecture with tapered impedance-matching transition regions between adjacent electrode segments. The tapered impedance-matching transition regions constitute the principal inventive feature and represent a structural departure from the abrupt-transition segmented TWE designs of the prior art.
In accordance with various embodiments, the present invention provides the following key inventive features:
First, a tapered impedance-matching transition feature is provided between each pair of adjacent electrode segments. Each electrode segment transitions to the next via a continuously tapered geometry in which the electrode width and/or gap spacing between the signal electrode and ground electrodes are gradually varied over a defined taper length. This continuous geometric variation eliminates the abrupt impedance discontinuities that characterize prior art segmented TWE designs, resulting in a smooth, continuous impedance profile along the full length of the modulator.
Second, the segmented traveling-wave electrode incorporates variable segment lengths. The electrode segments have lengths that are non-uniform and are individually optimized based on the local optical-electrical velocity mismatch at each longitudinal position along the modulator arm. This variable-length segmentation, combined with the tapered transitions, provides superior velocity matching performance compared to conventional uniform-length segmented designs.
Third, the invention provides multi-channel integration, wherein multiple MZM channels are fabricated on a single silicon-photonics die. The channels share a common substrate and optical routing layer, while each channel has an independently driven segmented TWE with its own set of tapered impedance-matching transition regions. This multi-channel architecture enables aggregate data rates of 800G to 1.6T and beyond from a single photonic integrated circuit.
Fourth, the taper geometry of each transition region is engineered such that the characteristic impedance of the traveling-wave electrode transitions smoothly from one segment impedance to the next, maintaining a target impedance profile — for example, 50 Ω ± 2 Ω — across the full modulator length. This impedance profile engineering is achieved through careful selection of the taper function (e.g., linear, raised-cosine, or Klopfenstein taper profiles) and taper dimensions.
Fifth, the tapered electrode structures are fabrication-compatible. They are realized using standard photolithographic patterning on a silicon-on-insulator (SOI) platform without requiring additional process steps, masks, or specialized fabrication techniques beyond those already employed in conventional silicon-photonics manufacturing flows.
Through the combination of these features, the present invention enables silicon-photonic Mach-Zehnder modulators with electro-optic bandwidths exceeding 67 GHz, which is sufficient for 100 Gbaud PAM-4 modulation as required by 800G transceiver standards. The modulators maintain low drive voltage (Vπ < 3.5 V at DC) across all channels, along with low insertion loss and high extinction ratio. The invention thereby addresses the design limitations of prior art electrode segmentation approaches by introducing the tapered impedance-matching transition as the distinguishing structural element that enables broadband, high-fidelity electro-optic modulation at next-generation data rates.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will be more fully understood from the following detailed description, taken in conjunction with the accompanying drawings, in which:
FIG. 1 is a top-level block diagram of a multi-channel silicon-photonic transceiver module incorporating the inventive Mach-Zehnder modulator array, showing the laser source, modulator array, driver electronics, and fiber array coupling interfaces.
FIG. 2 is a plan view of a single-channel Mach-Zehnder modulator illustrating the segmented traveling-wave electrode with tapered impedance-matching transition regions disposed between adjacent electrode segments, with the transition regions highlighted for clarity.
FIG. 3A is a cross-sectional view taken along line A-A' of FIG. 2, showing an electrode segment in a main segment region, and illustrating the electrode width W₁, gap spacing G₁ between the signal electrode and ground electrodes, and the underlying silicon waveguide ridge with PN-junction phase shifter.
FIG. 3B is a cross-sectional view taken along line B-B' of FIG. 2, at the midpoint of a tapered impedance-matching transition region, showing the intermediate electrode width Wt and gap spacing Gt, and illustrating the gradual geometric variation relative to the adjacent main segment regions.
FIG. 4 is a graph of characteristic impedance Z₀ (in ohms) as a function of position along the modulator length (in millimeters), illustrating the smooth, continuous impedance profile achieved by the tapered impedance-matching transition regions of the present invention (solid line) compared with the step-function impedance profile of a prior art uniform-segment design with abrupt transitions (dashed line).
FIG. 5 is a graph of simulated electro-optic frequency response (S21, in dB) as a function of frequency (in GHz), comparing the inventive tapered-transition segmented TWE design (solid line, showing a 3-dB bandwidth of approximately 70 GHz) with a conventional abrupt-transition segmented TWE design (dashed line, showing a 3-dB bandwidth of approximately 48 GHz).
FIG. 6 is a plan view of a four-channel Mach-Zehnder modulator array on a silicon-photonics die, showing the arrangement of four independent modulator channels each having a segmented TWE with tapered impedance-matching transition regions, along with shared optical input/output coupling structures and fiber array interfaces.
FIG. 7 is a detailed plan view of a single tapered impedance-matching transition region, with dimensional annotations including taper length L_t, starting electrode width W₁, ending electrode width W₂, starting gap spacing G₁, and ending gap spacing G₂, showing the continuous geometric variation from the first electrode segment to the second electrode segment.
FIG. 8 is a flowchart illustrating a method of fabricating the segmented traveling-wave electrode with tapered impedance-matching transition regions using photolithographic patterning on a silicon-on-insulator substrate, including the steps of waveguide formation, junction implantation, dielectric cladding deposition, and single-step electrode metallization and patterning.
FIG. 9 presents simulated eye diagram results for 100 Gbaud PAM-4 modulation using the inventive four-channel modulator at an aggregate data rate of 1.6T (4 × 400G per channel), showing clear eye openings and acceptable signal quality metrics.
FIG. 10 is a schematic diagram of the RF driver interface, showing impedance-matched termination at each electrode segment end, the segmented TWE electrode structure, and the RF signal path from the driver IC through the modulator electrode.
DETAILED DESCRIPTION OF THE INVENTION
The following detailed description sets forth specific embodiments of the present invention by way of illustration and not by way of limitation. It will be understood by those skilled in the art that various changes and modifications may be made to the described embodiments without departing from the spirit and scope of the present invention as defined by the appended claims. Throughout this description, like reference numerals refer to like elements across the various figures.
1. Overview of Modulator Architecture
Referring now to FIGS. 1 and 6, the present invention provides a silicon-photonics integrated circuit (PIC) fabricated on a silicon-on-insulator (SOI) platform. The PIC comprises a plurality of parallel Mach-Zehnder modulator (MZM) channels arranged on a common substrate. In a preferred embodiment, four MZM channels are provided, although alternative embodiments may include two, six, eight, or other numbers of channels as described further below.
The silicon-photonics PIC is designed for integration into an optical transceiver module, as shown schematically in FIG. 1. The transceiver module includes a laser source (e.g., a distributed feedback (DFB) laser or an external-cavity laser), which provides a continuous-wave (CW) optical carrier at a designated wavelength in the C-band (approximately 1530–1565 nm) or O-band (approximately 1260–1360 nm). The CW optical carrier is coupled into the PIC via an edge coupler or grating coupler, and is distributed to the individual MZM channels through an on-chip optical power splitter network. The transceiver module further includes an electronic driver integrated circuit (IC) that provides high-speed RF data signals to the segmented traveling-wave electrodes of each MZM channel, and a fiber array interface for coupling the modulated optical outputs to an external fiber ribbon or connector.
Each MZM channel is configured as a Mach-Zehnder interferometer and comprises the following elements: (i) an input optical splitter, preferably implemented as a 1×2 multimode interference (MMI) coupler, which divides the incoming optical carrier into two substantially equal portions directed to a first arm and a second arm of the interferometer; (ii) first and second phase-shifting arms, each comprising a rib waveguide formed in the silicon device layer of the SOI substrate, wherein the rib waveguide incorporates a PN-junction or PIN-junction electro-optic phase shifter along its length; and (iii) an output optical combiner, preferably implemented as a 2×1 MMI coupler or a 2×2 MMI coupler, which recombines the optical signals from the two arms to produce a modulated optical output based on the relative phase difference induced by the applied electrical signals.
The PN-junction electro-optic phase shifter in each arm operates via the free-carrier plasma dispersion effect in silicon. When a reverse bias voltage is applied across the PN junction, the depletion width changes, altering the free-carrier concentration in the waveguide core and thereby modifying the effective refractive index of the guided optical mode. This refractive index change produces a corresponding phase shift in the optical signal propagating through the arm. By differentially driving the two arms of the interferometer, the relative phase between the arms is modulated, producing amplitude modulation of the combined output signal.
2. Segmented Traveling-Wave Electrode Structure
Referring now to FIG. 2 and FIG. 3A, each MZM arm is driven by a segmented traveling-wave electrode (TWE) structure. The segmented TWE comprises N electrode segments (where N is an integer of at least 3, and preferably 4 to 8) arranged in series along the longitudinal direction of the modulator arm. In a preferred embodiment, the segmented TWE comprises six electrode segments (N = 6), although the present invention is not limited to any particular number of segments.
Each electrode segment has a defined length L_n, where n denotes the segment index (n = 1 to N). The segment lengths are non-uniform and are individually optimized to achieve velocity matching between the RF signal propagating along the electrode and the optical mode propagating in the underlying silicon waveguide. The optimization of segment lengths takes into account the local RF propagation velocity, which depends on the electrode geometry (width, thickness, and gap spacing), the dielectric environment (silicon dioxide cladding, silicon substrate, and buried oxide layer), and the frequency-dependent characteristics of the transmission line.
In the preferred six-segment embodiment, the segment lengths are as follows:
L₁ = 450 µm (first segment, nearest the RF input) L₂ = 520 µm L₃ = 580 µm L₄ = 610 µm L₅ = 550 µm L₆ = 490 µm (last segment, nearest the RF termination)
The total active modulation length per arm is approximately 3.2 mm (exclusive of the tapered impedance-matching transition regions). Including the transition regions, the total electrode length per arm is approximately 3.7–3.9 mm, depending on the selected taper lengths.
The electrode segments are formed of a metal layer deposited and patterned on top of a dielectric cladding layer that overlies the silicon waveguide. In the preferred embodiment, the metal layer comprises aluminum with a thickness of approximately 1.5 µm. Alternative embodiments may employ copper metallization for reduced RF resistive loss. The electrode structure is configured as a coplanar waveguide (CPW) transmission line, comprising a central signal electrode disposed directly above the waveguide ridge, and two ground electrodes disposed on either side of the signal electrode, separated by gap regions.
Within each electrode segment, the signal electrode has a uniform width Wn and is separated from the ground electrodes by a uniform gap spacing Gn. The electrode width and gap spacing are selected for each segment to achieve a target characteristic impedance (nominally 50 Ω) and to optimize the RF-optical velocity matching at the longitudinal position corresponding to that segment. Due to variations in the waveguide effective index, substrate properties, and accumulated dispersion along the modulator length, the optimal electrode geometry (Wn, Gn) varies from segment to segment.
3. Tapered Impedance-Matching Transition Regions
Referring now to FIG. 3B, FIG. 4, and FIG. 7, the present invention provides tapered impedance-matching transition regions between each pair of adjacent electrode segments. This feature constitutes the key inventive contribution of the present disclosure and distinguishes the present invention from prior art segmented TWE designs.
Between each pair of adjacent electrode segments — specifically, between segment n and segment n+1, for n = 1 to (N−1) — a tapered impedance-matching transition region is interposed. In the six-segment preferred embodiment, five tapered transition regions are provided (between segments 1–2, 2–3, 3–4, 4–5, and 5–6).
Each tapered impedance-matching transition region has a taper length L_t, which in the preferred embodiment is between 50 µm and 200 µm. More preferably, the taper length is between 80 µm and 150 µm. In a particularly preferred embodiment, the taper length is approximately 100 µm. The taper length is selected to be sufficiently long to provide a smooth impedance transition while remaining short enough to minimize the overall modulator length and avoid excessive RF loss in the transition regions.
Within each tapered impedance-matching transition region, the electrode geometry varies continuously along the longitudinal direction (i.e., along the direction of optical and RF propagation). Specifically, the signal electrode width varies continuously from Wn (the width of segment n) to W{n+1} (the width of segment n+1), and the gap spacing between the signal electrode and each ground electrode varies continuously from Gn (the gap of segment n) to G{n+1} (the gap of segment n+1). The variations in width and gap are monotonic — that is, the width either increases monotonically or decreases monotonically from one end of the transition region to the other, and similarly for the gap spacing — so that there are no reversals, oscillations, or local extrema in the geometry within the transition region.
The continuous geometric variation within the transition region produces a corresponding continuous variation in the characteristic impedance Z₀ of the transmission line. In the prior art, where electrode segments abut one another with abrupt geometric transitions, the characteristic impedance exhibits step-function discontinuities on the order of 5–15 Ω at each segment boundary. These discontinuities cause significant RF reflections and signal degradation. In the present invention, by contrast, the characteristic impedance transitions smoothly from Z₀,n (the impedance of segment n) to Z₀,n+1 (the impedance of segment n+1) over the taper length Lt, with a maximum impedance deviation ΔZmax at any point within the taper that does not exceed a predetermined threshold. In the preferred embodiment, ΔZ_max ≤ 2 Ω from the nominal target impedance of 50 Ω. That is, the characteristic impedance at every point within the tapered transition region remains within the range of 48 Ω to 52 Ω.
The taper profile — the function describing how the electrode geometry varies with longitudinal position within the transition region — may be selected from among several mathematical forms, depending on the performance requirements and design constraints. Three preferred taper profiles are described below.
Linear Taper Profile. In the simplest embodiment, the electrode width and gap spacing vary linearly with position within the transition region. For a transition region extending from longitudinal position zn (the end of segment n) to zn + L_t (the beginning of segment n+1), the characteristic impedance as a function of position is given by:
Z₀(z) = Z₀,n + (Z₀,n+1 − Z₀,n) · (z − zn) / Lt
where Z₀,n and Z₀,n+1 are the characteristic impedances of segments n and n+1, respectively, and L_t is the taper length. The linear taper provides a simple, straightforward impedance transition and is suitable for applications where the impedance difference between adjacent segments is small (e.g., ΔZ < 3 Ω).
Raised-Cosine Taper Profile. In a second embodiment, the electrode geometry varies according to a raised-cosine function, which provides a smoother transition with zero first derivatives at the taper endpoints. The impedance variation is given by:
Z₀(z) = Z₀,n + (Z₀,n+1 − Z₀,n) · [1 − cos(π · (z − zn) / Lt)] / 2
The raised-cosine taper provides improved return loss performance compared to the linear taper, particularly at higher frequencies, because the gradual onset and termination of the impedance change reduce the generation of reflected waves at the taper boundaries.
Klopfenstein Taper Profile. In a third and particularly preferred embodiment, the taper geometry follows a Klopfenstein profile, which is mathematically optimized to provide the minimum possible return loss over a specified bandwidth for a given taper length and impedance ratio. The Klopfenstein taper is well known in the microwave engineering literature as the optimal impedance taper for transmission line matching. The impedance variation is described by:
ln Z₀(z) = [ln(Z₀,n · Z₀,n+1)]^(1/2) + (Γ₀ / cosh A) · A² · φ(2z/L_t − 1, A)
where Γ₀ is the nominal reflection coefficient, A is a design parameter related to the passband ripple specification, and φ is the Klopfenstein auxiliary function. The Klopfenstein taper is preferred for embodiments targeting the widest possible modulation bandwidth with the most stringent return loss requirements.
Electromagnetic simulation results, summarized in FIG. 4, demonstrate the superiority of the tapered transition approach. For a representative segment boundary with an impedance change from 49.5 Ω to 50.8 Ω, the simulated return loss (S11) of the tapered transition is below −25 dB across the frequency range from DC to 70 GHz. By contrast, the same impedance change realized as an abrupt transition exhibits return loss of approximately −12 dB, representing a degradation of more than 13 dB. Over a multi-segment electrode with five such transitions, the cumulative effect of the abrupt transitions produces aggregate return loss of approximately −6 dB at 60 GHz, severely degrading the forward-propagating RF signal. The tapered transitions, by contrast, maintain aggregate return loss below −20 dB across the full bandwidth.
The tapered impedance-matching transition regions preserve RF signal integrity, reduce inter-segment reflections, and enable the full intrinsic bandwidth of each electrode segment to be utilized without parasitic bandwidth narrowing caused by impedance discontinuities. This results in a dramatic improvement in the overall electro-optic bandwidth of the modulator, as shown by the frequency response comparison in FIG. 5.
4. Variable Segment Length Optimization
The non-uniform segment lengths described above are determined through an optimization methodology that seeks to match the RF phase velocity along the electrode to the optical group velocity in the waveguide at each longitudinal position. The RF phase velocity v_RF is given by:
vRF = c / (εeff)^(1/2)
where c is the speed of light in vacuum and εeff is the effective dielectric constant of the transmission line, which depends on the electrode geometry and the surrounding dielectric materials. The optical group velocity vopt is determined by the waveguide geometry, the silicon refractive index, and the cladding material properties.
In a silicon-photonic MZM on an SOI platform, the optical group velocity is typically in the range of c/3.8 to c/4.2 (depending on waveguide dimensions and wavelength), while the RF phase velocity depends strongly on electrode geometry and can range from c/2.5 to c/4.5. Velocity matching requires that vRF ≈ vopt at each longitudinal position. Because the electrode geometry varies from segment to segment (in order to maintain impedance matching), the local RF velocity also varies. The segment lengths are chosen such that the accumulated RF phase delay through each segment closely matches the accumulated optical phase delay through the corresponding waveguide section.
In the preferred six-segment embodiment, the segment lengths (L₁ = 450 µm, L₂ = 520 µm, L₃ = 580 µm, L₄ = 610 µm, L₅ = 550 µm, L₆ = 490 µm) are optimized using full-wave electromagnetic simulation and iterative optimization algorithms to achieve velocity matching within ±2% across all segments. This close velocity matching, combined with the tapered impedance transitions, ensures constructive accumulation of the electro-optic interaction over the full modulator length, maximizing the modulation efficiency and bandwidth.
5. Multi-Channel Integration
Referring now to FIG. 6, the present invention provides a multi-channel MZM array integrated on a single silicon-photonics die. In the preferred embodiment, four MZM channels are provided, arranged in a parallel configuration on the die. The die has approximate dimensions of 5 mm × 12 mm, which is compatible with standard photonic integrated circuit packaging and co-packaged optics form factors.
The four MZM channels are arranged at a channel pitch of 250 µm, which is compatible with standard single-mode fiber array coupling interfaces (e.g., fiber V-groove arrays with 250 µm pitch). The shared optical input is provided by a laser source coupled to the die via an edge coupler or grating coupler at one end of the die. An on-chip optical power splitter (e.g., a 1×4 MMI coupler or a cascaded tree of 1×2 splitters) distributes the CW optical carrier to the four MZM channels. The modulated optical outputs from the four channels are routed to individual output waveguides that terminate at edge couplers or grating couplers at the output end of the die, where they are coupled to an output fiber array.
Each of the four MZM channels operates independently and is driven by a separate RF data signal from the electronic driver IC. In the preferred embodiment, each channel is configured for PAM-4 (pulse-amplitude modulation, 4 levels) at a symbol rate of 100 Gbaud, providing a per-channel data rate of 200 Gbps (100 Gbaud × 2 bits/symbol). With four channels, the aggregate data rate is 800 Gbps. When combined with wavelength-division multiplexing (WDM) using two wavelengths, the aggregate transceiver data rate reaches 1.6 Tbps.
In an alternative embodiment, each channel may be configured for higher-order modulation formats (e.g., PAM-8 or 16-QAM in a coherent architecture) to achieve even higher per-channel data rates. The segmented TWE architecture with tapered impedance-matching transitions is equally applicable to coherent modulator configurations, including in-phase/quadrature (I/Q) MZM structures.
Each channel's segmented TWE is independently driven and independently terminated, ensuring that inter-channel crosstalk is minimized. The ground electrodes of adjacent channels may be shared to conserve die area, or may be provided as independent ground structures with inter-channel isolation trenches, depending on the crosstalk isolation requirements of the specific application.
6. Fabrication Process Overview
Referring now to FIG. 8, the fabrication of the silicon-photonic MZM with segmented TWE and tapered impedance-matching transitions is performed using a standard silicon-photonics process flow on an SOI substrate. The process flow comprises the following principal steps:
Step 1: Substrate Preparation. An SOI substrate is provided, having a silicon device layer with a thickness of approximately 220 nm, a buried oxide (Box) layer with a thickness of approximately 2 µm, and a silicon handle wafer. The 220 nm silicon device layer thickness is a widely adopted standard in the silicon-photonics industry, providing single-mode waveguide operation at telecom wavelengths (1260–1360 nm and 1530–1565 nm).
Step 2: Waveguide Patterning. The silicon device layer is patterned to form the optical waveguide structures, including the MZM arm waveguides, the input and output MMI couplers, the power splitter network, and the edge coupler or grating coupler structures. Patterning is performed using deep-ultraviolet (DUV) photolithography (e.g., 193 nm immersion lithography) or extreme-ultraviolet (EUV) lithography, followed by reactive ion etching (RIE) to transfer the pattern into the silicon layer. Rib waveguide geometries are formed by partial-etch (slab etch) processes, leaving a slab region of approximately 90 nm thickness adjacent to the rib.
Step 3: PN-Junction Formation. The PN-junction electro-optic phase shifters are formed in the rib waveguide arms by selective ion implantation. Boron ions are implanted to form the p-type region on one side of the waveguide, and phosphorus ions are implanted to form the n-type region on the opposite side. The implant profiles are designed to position the PN junction at or near the center of the waveguide rib, where the optical mode intensity is highest, to maximize the electro-optic overlap integral. Additional p++ and n++ contact implants are formed at the edges of the slab region to provide low-resistance ohmic contacts to the metallization.
Step 4: Dielectric Cladding Deposition. A silicon dioxide (SiO₂) cladding layer is deposited over the patterned waveguide structures by plasma-enhanced chemical vapor deposition (PECVD). The cladding layer has a thickness of approximately 1.5–2.0 µm and provides optical confinement, electrical isolation between the waveguide and the electrode metal, and a planarized surface for subsequent metallization. Contact vias are etched through the cladding to expose the p++ and n++ contact regions of the PN junction.
Step 5: Electrode Metallization and Patterning. A metal layer — preferably aluminum with a thickness of approximately 1.5 µm — is deposited over the dielectric cladding by physical vapor deposition (PVD) or sputtering. The metal layer is then patterned using photolithography and either wet etching or dry (plasma) etching to define the segmented traveling-wave electrode structure, including all electrode segments, the tapered impedance-matching transition regions between segments, and the ground electrodes.
Critically, the tapered impedance-matching transition regions are defined in the same lithographic mask and patterning step as the main electrode segments. The continuously varying electrode width and gap spacing within each transition region are represented as a smooth geometric contour on the photolithographic mask, which is faithfully reproduced in the metal layer by the lithographic process. No additional masks, additional metal layers, or additional process steps are required to form the tapered transitions. This fabrication compatibility is an important advantage of the present invention, as it means that the improved modulation performance provided by the tapered transitions is achieved without any increase in manufacturing cost or complexity relative to conventional segmented TWE designs.
Step 6: Passivation and Packaging. Following electrode patterning, a passivation layer (e.g., SiO₂ or Si₃N₄) is deposited over the electrode structure for protection. Bond pads are opened for wirebonding or flip-chip bonding to the electronic driver IC. The completed die is then singulated, tested, and packaged into the optical transceiver module.
7. Performance Characteristics
The performance of the inventive silicon-photonic MZM with segmented TWE and tapered impedance-matching transitions has been characterized through electromagnetic simulation and photonic circuit simulation. The key performance metrics are summarized below with reference to FIGS. 5 and 9.
Electro-Optic Bandwidth. The simulated electro-optic 3-dB bandwidth of the inventive modulator is approximately 70 GHz, as shown by the solid curve in FIG. 5. This represents a substantial improvement over the approximately 48 GHz bandwidth of a conventional segmented TWE modulator with abrupt segment transitions (dashed curve in FIG. 5). The targeted measured bandwidth for fabricated devices is greater than 60 GHz, with a design margin to account for fabrication variations and measurement uncertainties. The achieved bandwidth of at least 67 GHz is sufficient to support 100 Gbaud PAM-4 modulation with acceptable signal quality, as required for 800G and 1.6T transceiver applications.
Half-Wave Voltage (Vπ). The half-wave voltage of the modulator — the voltage required to produce a π-radian phase shift between the two arms of the interferometer — is less than 3.5 V at DC and less than 5.0 V at 50 GHz. The low Vπ is achieved by the long interaction length (approximately 3.2 mm per arm) enabled by the multi-segment electrode architecture, combined with efficient velocity matching across all segments. The low drive voltage is essential for compatibility with CMOS driver ICs operating at supply voltages of 1.0–1.8 V (with on-chip voltage boosting or differential drive).
Insertion Loss. The optical insertion loss of the modulator is less than 4 dB per channel, accounting for the modulator itself but excluding fiber-to-chip coupling losses. The principal contributions to insertion loss are: free-carrier absorption in the doped PN-junction regions (approximately 1.5–2.0 dB), waveguide propagation loss (approximately 0.5–1.0 dB for the 3.2 mm arm length at approximately 2–3 dB/cm), and excess loss of the MMI couplers (approximately 0.3 dB per coupler).
Extinction Ratio. The static extinction ratio — the ratio of maximum to minimum optical output power — exceeds 30 dB, indicating excellent arm balance and coupler symmetry. The dynamic extinction ratio, measured under modulation at 100 Gbaud PAM-4, exceeds 10 dB, providing sufficient contrast for reliable signal detection at the receiver.
Eye Diagram Quality. Simulated eye diagrams for 100 Gbaud PAM-4 modulation are shown in FIG. 9. The four-channel modulator produces clear, open eye patterns for all four PAM-4 levels across all channels, with estimated transmitter and dispersion eye closure quaternary (TDECQ) values of less than 3.5 dB. The aggregate data rate achieved by the four-channel modulator is 1.6 Tbps (4 channels × 100 Gbaud × 2 bits/symbol × 2 wavelengths, or 4 channels × 400G per channel in a single-wavelength configuration).
8. Alternative Embodiments
The present invention is not limited to the specific embodiments described above and illustrated in the drawings. Various alternative embodiments are contemplated within the scope of the present invention, including but not limited to the following:
Two-Channel Embodiment. In an alternative embodiment, two MZM channels are provided on a single die for an aggregate data rate of 800G. This two-channel configuration is suitable for transceiver modules targeting 800G applications with relaxed power consumption and die size requirements.
Eight-Channel Embodiment. In another alternative embodiment, eight MZM channels are provided on a single die for an aggregate data rate of 3.2T. This eight-channel configuration targets ultra-high-bandwidth applications in next-generation data centers and telecommunications infrastructure.
PIN-Junction Phase Shifters. In an alternative embodiment, the electro-optic phase shifters in the MZM arms employ PIN-junction structures in lieu of the PN-junction structures of the preferred embodiment. PIN-junction phase shifters offer higher modulation efficiency (lower Vπ) at the cost of reduced bandwidth due to the slower carrier dynamics associated with carrier injection and extraction.
Copper Metallization. In an alternative embodiment, the electrode segments and tapered transition regions are formed using copper metallization in lieu of aluminum. Copper offers lower resistive loss (due to its higher electrical conductivity), which can improve the RF signal quality at high frequencies and further extend the electro-optic bandwidth.
Si₃N₄ Cladding. In an alternative embodiment, the dielectric cladding layer comprises silicon nitride (Si₃N₄) instead of or in addition to silicon dioxide (SiO₂). Silicon nitride cladding can provide improved RF performance due to its different dielectric constant and loss characteristics, and can also serve as a stress-balancing layer to reduce wafer bow and improve process uniformity.
Nonlinear Taper Profiles. In alternative embodiments, the taper profile of the impedance-matching transition regions may follow exponential, Chebyshev, or other nonlinear taper functions optimized for specific performance criteria such as minimum passband ripple, maximum out-of-band rejection, or minimum taper length for a given return loss specification.
On-Chip Photodetectors. In an alternative embodiment, on-chip germanium (Ge) or germanium-silicon (GeSi) photodetectors are integrated on the same die as the MZM array, positioned to monitor a tapped portion of each channel's modulated output signal. The photodetector outputs can be used for feedback control of modulator bias point, power monitoring, and adaptive signal optimization.
Coherent Modulation Formats. In alternative embodiments, the MZM channels are configured for coherent modulation formats, including quadrature phase-shift keying (QPSK), 8-QAM, and 16-QAM. In such embodiments, nested MZM structures (I/Q modulators) are employed, with each I and Q component driven by a respective segmented TWE with tapered impedance-matching transitions.
The foregoing description of alternative embodiments is intended to illustrate the versatility and broad applicability of the present invention, and is not intended to limit the scope of the claims appended hereto.
It will be understood by those skilled in the art that the foregoing detailed description is illustrative of the present invention and does not limit the scope thereof. Various modifications, substitutions, and alterations can be made without departing from the spirit and scope of the invention as defined by the appended claims. All such modifications are intended to fall within the scope of the present invention.
ABSTRACT OF THE DISCLOSURE
A multi-channel silicon-photonic Mach-Zehnder modulator is disclosed, comprising a plurality of modulator channels each having a segmented traveling-wave electrode with tapered impedance-matching transition regions between adjacent electrode segments. Each tapered impedance-matching transition region provides a continuous, smooth variation in electrode geometry — including electrode width and electrode-to-ground gap spacing — from one segment to the next, thereby producing a smooth impedance profile along the modulator length and eliminating the abrupt impedance discontinuities present in conventional segmented electrode designs. The taper profile may be linear, raised-cosine, or Klopfenstein. The modulator achieves electro-optic bandwidths exceeding 67 GHz, enabling data modulation at 100 Gbaud PAM-4 and aggregate data rates of 800G to 1.6T per transceiver module. The device is fabricated on a silicon-on-insulator platform using standard photolithographic processes, with the tapered transitions defined in the same lithographic step as the electrode segments.
CLAIMS
What is claimed is:
1. A silicon-photonic Mach-Zehnder modulator, comprising:
a silicon-on-insulator substrate;
a Mach-Zehnder interferometer formed in a silicon waveguide layer on the substrate, the Mach-Zehnder interferometer comprising a first arm and a second arm, each of the first arm and the second arm including an electro-optic phase shifter;
a segmented traveling-wave electrode disposed over at least one of the first arm and the second arm, the segmented traveling-wave electrode comprising a plurality of electrode segments arranged in series along a longitudinal direction of the at least one of the first arm and the second arm; and
a tapered impedance-matching transition region disposed between each pair of adjacent electrode segments of the plurality of electrode segments, each tapered impedance-matching transition region having an electrode geometry that varies continuously along the longitudinal direction from a first geometry corresponding to a first one of the pair of adjacent electrode segments to a second geometry corresponding to a second one of the pair of adjacent electrode segments, such that a characteristic impedance of the segmented traveling-wave electrode transitions continuously through the tapered impedance-matching transition region.
2. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein each tapered impedance-matching transition region has a taper length of between 50 µm and 200 µm.
3. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the electrode geometry within each tapered impedance-matching transition region varies according to a linear taper profile.
4. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the electrode geometry within each tapered impedance-matching transition region varies according to a Klopfenstein taper profile.
5. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the characteristic impedance of the segmented traveling-wave electrode deviates by no more than 2 Ω from a target impedance of 50 Ω within each tapered impedance-matching transition region.
6. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the plurality of electrode segments comprises at least four electrode segments having non-uniform segment lengths.
7. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the electro-optic phase shifter comprises a PN junction formed in a silicon waveguide of the silicon waveguide layer.
8. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein the modulator has an electro-optic 3-dB bandwidth of at least 67 GHz.
9. The silicon-photonic Mach-Zehnder modulator of claim 1, wherein a half-wave voltage (Vπ) of the modulator is less than 3.5 V at DC.
10. A multi-channel silicon-photonic integrated circuit, comprising:
a silicon-on-insulator substrate;
a plurality of Mach-Zehnder modulator channels formed on the silicon-on-insulator substrate, each Mach-Zehnder modulator channel comprising a Mach-Zehnder interferometer having a first phase-shifting arm and a second phase-shifting arm; and
for each Mach-Zehnder modulator channel, a segmented traveling-wave electrode comprising N electrode segments, where N is an integer equal to or greater than 3, disposed over at least one of the first phase-shifting arm and the second phase-shifting arm, and (N−1) tapered impedance-matching transition regions, each tapered impedance-matching transition region disposed between a respective pair of adjacent electrode segments of the N electrode segments, wherein within each tapered impedance-matching transition region an electrode width and a gap spacing between the segmented traveling-wave electrode and a ground plane vary monotonically along a longitudinal direction of the at least one of the first phase-shifting arm and the second phase-shifting arm.
11. The multi-channel silicon-photonic integrated circuit of claim 10, wherein the plurality of Mach-Zehnder modulator channels comprises four Mach-Zehnder modulator channels configured for an aggregate data rate of 1.6 Tbps.
12. The multi-channel silicon-photonic integrated circuit of claim 10, wherein each Mach-Zehnder modulator channel is configured for PAM-4 modulation at a symbol rate of at least 100 Gbaud.
13. The multi-channel silicon-photonic integrated circuit of claim 10, wherein the plurality of Mach-Zehnder modulator channels are arranged at a channel pitch of 250 µm.
14. The multi-channel silicon-photonic integrated circuit of claim 10, wherein each of the (N−1) tapered impedance-matching transition regions is defined by a monotonic variation in both the electrode width and the gap spacing between the segmented traveling-wave electrode and the ground plane.
15. The multi-channel silicon-photonic integrated circuit of claim 10, wherein each of the N electrode segments has a segment length selected to achieve velocity matching between an RF signal propagating along the segmented traveling-wave electrode and an optical mode propagating in a waveguide of the at least one of the first phase-shifting arm and the second phase-shifting arm.
16. The multi-channel silicon-photonic integrated circuit of claim 15, wherein the segment lengths of the N electrode segments are non-uniform.
17. The multi-channel silicon-photonic integrated circuit of claim 10, wherein a characteristic impedance of each tapered impedance-matching transition region remains within ±2 Ω of 50 Ω throughout the tapered impedance-matching transition region.
18. A method of fabricating a silicon-photonic Mach-Zehnder modulator, comprising:
providing a silicon-on-insulator substrate;
forming a Mach-Zehnder interferometer in a silicon waveguide layer of the silicon-on-insulator substrate;
depositing a metal layer over a dielectric cladding layer disposed on the silicon-on-insulator substrate; and
patterning the metal layer in a single lithographic step to define a segmented traveling-wave electrode comprising a plurality of electrode segments and a tapered impedance-matching transition region between each pair of adjacent electrode segments of the plurality of electrode segments, each tapered impedance-matching transition region having an electrode width that varies continuously along a longitudinal direction from a width of a first adjacent electrode segment to a width of a second adjacent electrode segment.
19. The method of claim 18, wherein the patterning comprises defining each tapered impedance-matching transition region and the plurality of electrode segments using a single photolithographic mask.
20. The method of claim 18, wherein the metal layer comprises aluminum having a thickness of approximately 1.5 µm.
21. The method of claim 18, further comprising forming a PN junction in the silicon waveguide layer by ion implantation prior to depositing the metal layer.
22. The method of claim 18, wherein a taper length of each tapered impedance-matching transition region is between 80 µm and 150 µm.
23. The method of claim 18, wherein the plurality of electrode segments comprises six electrode segments having variable segment lengths.
24. The method of claim 18, wherein the silicon-on-insulator substrate has a silicon device layer with a thickness of approximately 220 nm and a buried oxide layer with a thickness of approximately 2 µm.
25. A method of modulating an optical signal, comprising:
providing a silicon-photonic Mach-Zehnder modulator comprising a segmented traveling-wave electrode having a plurality of electrode segments and tapered impedance-matching transition regions disposed between adjacent electrode segments of the plurality of electrode segments;
coupling an optical carrier into the silicon-photonic Mach-Zehnder modulator;
applying an RF data signal to the segmented traveling-wave electrode; and
modulating the optical carrier at a modulation bandwidth of at least 50 GHz, wherein a characteristic impedance of the segmented traveling-wave electrode deviates by no more than 2 Ω from a target impedance across the segmented traveling-wave electrode including through each of the tapered impedance-matching transition regions.
26. The method of claim 25, wherein the optical carrier is modulated in a PAM-4 format at a baud rate of at least 100 Gbaud.
27. The method of claim 25, wherein the RF data signal is applied to a plurality of independently driven multi-channel Mach-Zehnder modulators disposed on a single die.
28. The method of claim 25, wherein the modulation bandwidth is at least 67 GHz.
ASSIGNMENT OF PATENT APPLICATION
ASSIGNMENT
WHEREAS, the undersigned inventors, Dr. Rajan Menon, Dr. Lena Strickland, Dr. Feng-Yi Chen, and Dr. Arjun Dasgupta (collectively, the "Assignors"), are the original and joint inventors of the invention described and claimed in U.S. Patent Application No. 17/672,204, titled "Multi-Channel Silicon-Photonic Mach-Zehnder Modulator with Segmented Traveling-Wave Electrode Architecture," filed January 9, 2023, and in U.S. Provisional Application No. 63/297,841, filed January 10, 2022, and any and all continuations, continuations-in-part, divisions, reissues, and foreign counterparts thereof (collectively, the "Patent Applications");
WHEREAS, Optiwave Semiconductor Corp., a Delaware corporation, having a principal place of business at 4710 Ridgeview Parkway, Suite 300, Santa Clara, CA 95054 (the "Assignee"), desires to acquire the entire right, title, and interest in and to the invention and the Patent Applications;
NOW, THEREFORE, for good and valuable consideration, the receipt and sufficiency of which are hereby acknowledged, each of the undersigned Assignors does hereby sell, assign, transfer, and set over unto the Assignee, its successors, legal representatives, and assigns, the entire right, title, and interest in and to the invention disclosed and claimed in the Patent Applications, including:
(a) all rights under the Patent Applications, and any and all patents that may be granted thereon;
(b) all rights of priority arising from or related to the Patent Applications;
(c) all rights to file and prosecute applications for patents, including continuations, continuations-in-part, divisions, reissues, and reexaminations, in the United States and in any and all foreign countries;
(d) all rights to recover damages for past infringement of any patents that may be granted on the Patent Applications; and
(e) all other rights, privileges, and interests of any nature whatsoever pertaining to the invention and the Patent Applications.
The Assignors hereby covenant that they have full right to convey the entire interest herein assigned, and that they have not executed and will not execute any agreement in conflict herewith.
The Assignors hereby authorize and request the Commissioner for Patents of the United States Patent and Trademark Office, and any official of any country or patent office, to issue any and all patents resulting from the Patent Applications to the Assignee, as the assignee of the entire right, title, and interest therein.
This Assignment shall be binding upon the heirs, executors, administrators, successors, and assigns of the Assignors.
IN WITNESS WHEREOF, the undersigned have executed this Assignment as of the date(s) set forth below.